HD6413007F20 Renesas Electronics America, HD6413007F20 Datasheet - Page 17

IC H8 MCU ROMLESS 5V 100QFP

HD6413007F20

Manufacturer Part Number
HD6413007F20
Description
IC H8 MCU ROMLESS 5V 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD6413007F20

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD6413007F20V
Manufacturer:
RENESAS-Pb free
Quantity:
2
Section 1 Overview
1.1
1.2
1.3
Section 2 CPU
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
Overview...........................................................................................................................
Internal Block Diagram.....................................................................................................
Pin Description..................................................................................................................
1.3.1
1.3.2
1.3.3
Overview........................................................................................................................... 19
2.1.1
2.1.2
CPU Operating Modes ...................................................................................................... 21
Address Space ................................................................................................................... 22
Register Configuration ...................................................................................................... 23
2.4.1
2.4.2
2.4.3
2.4.4
Data Formats ..................................................................................................................... 27
2.5.1
2.5.2
Instruction Set ................................................................................................................... 30
2.6.1
2.6.2
2.6.3
2.6.4
2.6.5
Addressing Modes and Effective Address Calculation ..................................................... 44
2.7.1
2.7.2
Processing States............................................................................................................... 50
2.8.1
2.8.2
2.8.3
2.8.4
2.8.5
Pin Arrangement ..................................................................................................
Pin Functions .......................................................................................................
Pin Assignments in Each Mode ........................................................................... 14
Features................................................................................................................ 19
Differences from H8/300 CPU............................................................................. 20
Overview.............................................................................................................. 23
General Registers ................................................................................................. 24
Control Registers ................................................................................................. 25
Initial CPU Register Values ................................................................................. 26
General Register Data Formats ............................................................................ 27
Memory Data Formats ......................................................................................... 28
Instruction Set Overview ..................................................................................... 30
Instructions and Addressing Modes ..................................................................... 31
Tables of Instructions Classified by Function...................................................... 32
Basic Instruction Formats .................................................................................... 41
Notes on Use of Bit Manipulation Instructions.................................................... 42
Addressing Modes ............................................................................................... 44
Effective Address Calculation.............................................................................. 46
Overview.............................................................................................................. 50
Program Execution State...................................................................................... 51
Exception-Handling State .................................................................................... 51
Exception-Handling Sequences ........................................................................... 53
Bus-Released State............................................................................................... 54
...................................................................................................................... 19
.............................................................................................................
Contents
Rev.5.00 Sep. 12, 2007 Page xv of xxviii
REJ09B0396-0500
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