NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 90
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NH82801GHM S L8YR
Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet
1.NH82801GHM_S_L8YR.pdf
(848 pages)
Specifications of NH82801GHM S L8YR
Lead Free Status / RoHS Status
Compliant
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3.4
Table 3-5.
90
ACZ_SDIN[2:0] (AC ‘97
ACZ_SDIN[2:0] (Intel®
DMI_CLKP, DMI_CLKN
PERp[4:1], PERn[4:1]
PERp[6:5], PERn[6:5]
High Definition Audio
(Intel
11.
12.
13.
Power Planes for Input Signals
Table 3-5
well as what device drives the signal at various times. Valid states include:
High
Low
Static: Will be high or low, but will not change
Driven: Will be high or low, and is allowed to change
Running: For input clocks
ICH7 suspend well signal states are indeterminate and undefined and may glitch prior
to RSMRST# deassertion. This does not apply to LAN_RST#, SLP_S3#, SLP_S4# and
SLP_S5#. These signals are determinate and defined prior to RSMRST# deassertion.
ICH7 core well signal states are indeterminate and undefined and may glitch prior to
PWROK assertion. This does not apply to FERR# and THRMTRIP#. These signals are
determinate and defined prior to PWROK assertion.
Power Plane for Input Signals for Desktop Only Configurations (Sheet 1 of 3)
(AC ‘97 Mode)
ICH7DH Only)
Signal Name
ACZ_BIT_CLK
DMI[3:0]RXP,
DMI[3:0]RXN
INTRUDER#
A20GATE
EE_DIN
®
DDREQ
IDEIRQ
FERR#
CLK14
CLK48
Mode)
Mode)
ICH7R and
GPIO25 transitions from pulled high internally to actively driven within 100 ms of the
Low until Intel High Definition Audio Controller Reset bit set (D27:F0:Offset
HDBAR+08h:bit 0), at which time ACZ_RST# will be High and ACZ_BIT_CLK will be
Running.
GPIO18 will toggle at a frequency of approximately 1 Hz when the ICH7 comes out of reset
deassertion of the RSMRST# pin.
and
Table 3-6
Power Well
Suspend
Suspend
Suspend
show the power plane associated with each input signal, as
Core
Core
Core
Core
Core
Core
Core
Core
Core
Core
RTC
Driver During Reset
Intel® High Definition
EEPROM Component
PCI Express* Device
Clock Generator
Clock Generator
Clock Generator
External Switch
Microcontroller
AC ’97 Codec
AC ’97 Codec
Audio Codec
IDE Device
Processor
External
(G)MCH
IDE
Running
Running
Running
Driven
Driven
Driven
Driven
Static
Static
Static
Static
Low
Low
Low
S1
Intel
®
ICH7 Family Datasheet
S3
Intel
Driven
Driven
Driven
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
COLD
®
ICH7 Pin States
1
S4/S5
Driven
Driven
Driven
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
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