NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 320

• Manufacturer Part Number: NH82801GHM S L8YR
• Manufacturer: Intel

Specifications of NH82801GHM S L8YR

• Lead Free Status / RoHS Status: Compliant

Table 8-5.
320
Self-Test Results Format
31:13
11:6
31:4
1:0
3:0
Bit
Bit
12
5
4
3
2
Reserved
General Self-Test Result (SELF_TST) — R/W (special).
0 = Pass
1 = Fail
Reserved
Diagnose Result (DIAG_RSLT) — R/W (special). This bit provides the result of an
internal diagnostic test of the Serial Subsystem.
0 = Pass
1 = Fail
Reserved
Register Result (REG_RSLT) — R/W (special). This bit provides the result of a test of
the internal Parallel Subsystem registers.
0 = Pass
1 = Fail
ROM Content Result (ROM_RSLT) — R/W (special). This bit provides the result of a
test of the internal microcode ROM.
0 = Pass
1 = Fail
Reserved
Pointer Field (PORT_PTR) — R/W (special). A 16-byte aligned address must be
written to this field when issuing a Self-Test command to the PORT interface.The results
of the Self Test will be written to the address specified by this field.
PORT Function Selection (PORT_FUNC) — R/W (special). Valid values are listed
below. All other values are reserved.
0000 = PORT Software Reset: Completely resets the LAN controller (all CSR and PCI
0001 = Self Test: The Self-Test begins by issuing an internal Selective Reset followed
0010 = Selective Reset: Sets the CU and RU to the Idle state, but otherwise
registers). This command should not be used when the device is active. If a
PORT Software Reset is desired, software should do a Selective Reset
(described below), wait for the PORT register to be cleared (completion of the
Selective Reset), and then issue the PORT Software Reset command. Software
should wait approximately 10 μs after issuing this command before attempting
to access the LAN controller’s registers again.
by a general internal self-test of the LAN controller. The results of the self-test
are written to memory at the address specified in the Pointer field of this
register. The format of the self-test result is shown in
completing the self-test and writing the results to memory, the LAN controller
will execute a full internal reset and will re-initialize to the default configuration.
Self-Test does not generate an interrupt of similar indicator to the host
processor upon completion.
maintains the current configuration parameters (RU and CU Base, HDSSize,
Error Counters, Configure information and Individual/Multicast Addresses are
preserved). Software should wait approximately 10 μs after issuing this
command before attempting to access the LAN controller’s registers again.
LAN Controller Registers (B1:D8:F0) (Desktop and Mobile Only)
Description
Description
Intel
Table
®
ICH7 Family Datasheet
8-5. After