NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 402

• Manufacturer Part Number: NH82801GHM S L8YR
• Manufacturer: Intel

Specifications of NH82801GHM S L8YR

• Lead Free Status / RoHS Status: Compliant

10.4.10
402
ELCR1—Master Controller Edge/Level Triggered Register
(LPC I/F—D31:F0)
Offset Address: 4D0h
Default Value:
In edge mode, (bit[x] = 0), the interrupt is recognized by a low to high transition. In
level mode (bit[x] = 1), the interrupt is recognized by a high level. The cascade
channel, IRQ2, the heart beat timer (IRQ0), and the keyboard controller (IRQ1),
cannot be put into level mode.
2:0
Bit
7
6
5
4
3
IRQ7 ECL — R/W.
0 = Edge.
1 = Level.
IRQ6 ECL — R/W.
0 = Edge.
1 = Level.
IRQ5 ECL — R/W.
0 = Edge.
1 = Level.
IRQ4 ECL — R/W.
0 = Edge.
1 = Level.
IRQ3 ECL — R/W.
0 = Edge.
1 = Level.
Reserved. Must be 0.
00h
Description
Attribute:
Size:
LPC Interface Bridge Registers (D31:F0)
Intel
R/W
8 bits
®
ICH7 Family Datasheet