NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 329

• Manufacturer Part Number: NH82801GHM S L8YR
• Manufacturer: Intel

Specifications of NH82801GHM S L8YR

• Lead Free Status / RoHS Status: Compliant

LAN Controller Registers (B1:D8:F0) (Desktop and Mobile Only)
8.3
Table 8-7.
Intel
®
ICH7 Family Datasheet
The processor can access the counters by issuing a Dump Statistical Counters SCB
command. This provides a “snapshot”, in main memory, of the internal LAN controller
statistical counters. The LAN controller supports 21 counters. The dump could consist
of the either 16, 19, or all 21 counters, depending on the status of the Extended
Statistics Counters and TCO Statistics configuration bits in the Configuration command.
ASF Configuration Registers
(LAN Controller—B1:D8:F0)
The ASF registers in this table are accessible through the ICH7 SMBus slave interface.
ASF Register Address Map
E6h–E7h
Offset
statistics functions through the status of the receive header and directly through
these Statistical Counters.
EDh
E0h
E1h
E2h
E3h
E4h
E5h
E8h
E9h
EAh
EBh
ECh
FBh
FCh
FDh
F0h
F1h
F2h
F3h
F4h
F5h
F6h
F7h
F8h
F9h
FAh
FEh
FFh
INPOLL_TCONF
ASF_CNTL_EN
RETRAN_INT
RETRAN_PCL
RMCP_SNUM
WTIM_CONF
ASF_WTIM1
ASF_WTIM2
HEART_TIM
Mnemonic
PHIST_CLR
SMB_CNTL
ASF_CNTL
PET_SEQ1
PET_SEQ2
SP_MODE
FOR_ACT
ASF_RID
ENABLE
PMSK1
PMSK2
PMSK3
PMSK4
PMSK5
PMSK6
PMSK7
PMSK8
APM
STA
—
ASF Revision Identification
SMBus Control
ASF Control
ASF Control Enable
Enable
APM
Reserved
Watchdog Timer Configuration
Heartbeat Timer
Retransmission Interval
Retransmission Packet Count Limit
ASF Watchdog Timer 1
ASF Watchdog Timer 2
PET Sequence 1
PET Sequence 2
Status
Forced Actions
RMCP Sequence Number
Special Modes
Inter-Poll Timer Configuration
Poll History Clear
Polling Mask 1
Polling Mask 2
Polling Mask 3
Polling Mask 4
Polling Mask 5
Polling Mask 6
Polling Mask 7
Polling Mask 8
Register Name
Default
ECh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
40h
00h
00h
00h
08h
00h
02h
02h
03h
01h
00h
00h
00h
40h
02h
00h
x0h
10h
00h
—
R/WC, RO
R/W, RO
R/WC
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
—
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