NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 337
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NH82801GHM S L8YR
Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet
1.NH82801GHM_S_L8YR.pdf
(848 pages)
Specifications of NH82801GHM S L8YR
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LAN Controller Registers (B1:D8:F0) (Desktop and Mobile Only)
8.3.13
8.3.14
Intel
®
ICH7 Family Datasheet
PET_SEQ1—PET Sequence 1 Register
(ASF Controller—B1:D8:F0)
Offset Address: F0h
Default Value:
This register (low byte) holds the current value of the PET sequence number. This field
is read/write-able through this register, and is also automatically incremented by the
hardware when new PET packets are generated. By policy, software should not write to
this register unless transmission is disabled.
PET_SEQ2—PET Sequence 2 Register
(ASF Controller—B1:D8:F0)
Offset Address: F1h
Default Value:
This register (high byte) holds the current value of the PET sequence number. This field
is read/write-able through this register, and is also automatically incremented by the
hardware when new PET packets are generated. By policy, software should not write to
this register unless transmission is disabled.
7:0
7:0
Bit
Bit
PET Sequence Byte 1 (PSEQ1_VAL) — R/W. This field provides the low byte.
PET Sequence Byte 2 (PSEQ2_VAL) — R/W. This field provides the high byte.
00h
00h
Description
Description
Attribute:
Size:
Attribute:
Size:
R/W
8 bits
R/W
8 bits
337
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