NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 721

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NH82801GHM S L8YR

Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801GHM S L8YR

Lead Free Status / RoHS Status
Compliant
Intel® High Definition Audio Controller Registers (D27:F0)
19.1.34
19.1.35
Intel
®
ICH7 Family Datasheet
DEVC—Device Control Register
(Intel
Address Offset: 78h–79h
Default Value:
DEVS—Device Status Register
(Intel
Address Offset: 7Ah–7Bh
Default Value:
14:12
15:6
7:5
Bit
Bit
15
11
10
9
8
4
3
2
1
0
5
4
3
2
1
0
Reserved
Max Read Request Size — RO. Hardwired to 0 enabling 128B maximum read request
size.
No Snoop Enable (NSNPEN) — R/W.
0 = The Intel
1 = The Intel High Definition Audio controller is permitted to set the No Snoop bit in the
Note: This bit is not reset on D3
Auxiliary Power Enable — RO. Hardwired to 0, indicating that Intel High Definition Audio
device does not draw AUX power
Phantom Function Enable — RO. Hardwired to 0 disabling phantom functions.
Extended Tag Field Enable — RO. Hardwired to 0 enabling 5-bit tag.
Max Payload Size — RO. Hardwired to 0 indicating 128B.
Enable Relaxed Ordering — RO. Hardwired to 0 disabling relaxed ordering.
Unsupported Request Reporting Enable — RO. Not implemented. Hardwired to 0.
Fatal Error Reporting Enable — RO. Not implemented. Hardwired to 0.
Non-Fatal Error Reporting Enable — RO. Not implemented. Hardwired to 0.
Correctable Error Reporting Enable — RO. Not implemented. Hardwired to 0.
Reserved
Transactions Pending — RO.
0 = Indicates that completions for all non-posted requests have been received.
1 = Indicates that Intel
AUX Power Detected — RO. Hardwired to 1 indicating the device is connected to resume
power.
Unsupported Request Detected — RO. Not implemented. Hardwired to 0.
Fatal Error Detected — RO. Not implemented. Hardwired to 0.
Non-Fatal Error Detected — RO. Not implemented. Hardwired to 0.
Correctable Error Detected — RO. Not implemented. Hardwired to 0.
®
®
High Definition Audio Controller—D27:F0)
High Definition Audio Controller—D27:F0)
case, isochronous transfers will not use VC1 (VCi) even if it is enabled since VC1 is
not snooped. Isochronous transfers will use VC0.
Requester Attributes of a bus master transaction. In this case, VC0 or VC1 may be
used for isochronous transfers.
requests that have not been completed.
0800h
0010h
®
High Definition Audio controller will not set the No Snoop bit. In this
®
High Definition Audio controller has issued non-posted
HOT
to D0 transition; however, it is reset by PLTRST#.
Description
Description
Attribute:
Size:
Attribute:
Size:
R/W, RO
16 bits
RO
16 bits
721

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