NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 655

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NH82801GHM S L8YR

Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801GHM S L8YR

Lead Free Status / RoHS Status
Compliant
AC ’97 Modem Controller Registers (D30:F3) (Desktop and Mobile Only)
17.2
Table 17-2. Intel
Intel
®
ICH7 Family Datasheet
AC ’97 Modem I/O Space (D30:F3)
In the case of the split codec implementation accesses to the modem mixer registers in
different codecs are differentiated by the controller by using address offsets 00h
for the primary codec and address offsets 80h
shows the register addresses for the modem mixer registers.
NOTES:
1.
2.
3.
The Global Control (GLOB_CNT) and Global Status (GLOB_STA) registers are aliased to
the same global registers in the audio and modem I/O space. Therefore a read/write to
these registers in either audio or modem I/O space affects the same physical register.
Software could access these registers as bytes, word, DWord quantities, but reads
must not cross DWord boundaries.
These registers exist in I/O space and reside in the AC ’97 controller. The two channels,
Modem in and Modem out, each have their own set of Bus Mastering registers. The
following register descriptions apply to both channels. The naming prefix convention
used is as follows:
MI = Modem in channel
MO = Modem out channel
00h:38h
3Ch
3Eh
40h
42h
44h
46h
48h
4Ah
4Ch
4Eh
50h
52h
54h
56h
58h
5Ah
7Ch
7Eh
Primary
®
Registers in italics are for functions not supported by the ICH7
Software should not try to access reserved registers
The ICH7 supports a modem codec connected to ACZ_SDIN[2:0], as long as the Codec ID
is 00 or 01. However, the ICH7 does not support more than one modem codec.
ICH7 Modem Mixer Register Configuration
Register
80h:B8h
BCh
BEh
C0h
C2h
C4h
C6h
C8h
CAh
CCh
CEh
D0h
D2h
D4h
D6h
D8h
DAh
FCh
FEh
Secondary
Intel RESERVED
Extended Modem ID
Extended Modem Stat/Ctrl
Line 1 DAC/ADC Rate
Line 2 DAC/ADC Rate
Handset DAC/ADC Rate
Line 1 DAC/ADC Level Mute
Line 2 DAC/ADC Level Mute
Handset DAC/ADC Level Mute
GPIO Pin Config
GPIO Polarity/Type
GPIO Pin Sticky
GPIO Pin Wake Up
GPIO Pin Status
Misc. Modem AFE Stat/Ctrl
AC ’97 Reserved
Vendor Reserved
Vendor ID1
Vendor ID2
MMBAR Exposed Registers (D30:F3)
FEh for the secondary codec.
Name
Table 17-2
7Fh
655

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