NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 268

• Manufacturer Part Number: NH82801GHM S L8YR
• Manufacturer: Intel

Specifications of NH82801GHM S L8YR

• Lead Free Status / RoHS Status: Compliant

7.1.8
7.1.9
268
V0STS—Virtual Channel 0 Resource Status Register
Offset Address: 001A–001Bh
Default Value:
V1CAP—Virtual Channel 1 Resource Capability Register
Offset Address: 001C–001Fh
Default Value:
15:02
31:24
22:16
13:8
7:0
Bit
Bit
23
15
14
1
0
Reserved
VC Negotiation Pending (NP) — RO. When set, this bit indicates the virtual
channel is still being negotiated with ingress ports.
Port Arbitration Tables Status (ATS) — RO. There is no port arbitration table for this
VC, so this bit is reserved at 0.
Port Arbitration Table Offset (AT) — RO. This field indicates the location of the port
arbitration table in the root complex. A value of 3h indicates the table is at offset
30h.
Reserved
Maximum Time Slots (MTS) — R/WO. This value is updated by platform BIOS
based upon the determination of the number of time slots available in the platform.
Reject Snoop Transactions (RTS) — RO. All snoopable transactions on VC1 are
rejected. This VC is for isochronous transfers only.
Advanced Packet Switching (APS) — RO. This VC is capable of all transactions, not
just advanced packet switching transactions.
Reserved
Port Arbitration Capability (PAC) — RO. This field indicates the port arbitration
capability is time-based WRR of 128 phases.
0000h
30008010h
Description
Description
Attribute:
Size:
Attribute:
Size:
Chipset Configuration Registers
Intel
RO
16-bit
R/WO, RO
32-bit
®
ICH7 Family Datasheet