NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 182

• Manufacturer Part Number: NH82801GHM S L8YR
• Manufacturer: Intel

Specifications of NH82801GHM S L8YR

• Lead Free Status / RoHS Status: Compliant

Note:
Table 5-40. Heartbeat Message Data (Sheet 1 of 2)
182
Notes for previous two numbered lists.
Once the system transitions to the non-S0 state, it may send a single alert with an
incremental SEQUENCE number.
Table 5-40
Cover Tamper Status
Temp Event Status
Processor Missing Event
Status
TCO Timer Event Status 1 = This bit is set when the TCO timer expires.
Software Event Status
Unprogrammed
Firmware Hub Event
Status
GPIO Status
1. Normally, the ICH7 does not send heartbeat messages while in the G0 state
2. WARNING: It is important the BIOS clears the SECOND_TO_STS bit, as the alerts
3. A system that has locked up and can not be restarted with power button press is
4. A spurious alert could occur in the following sequence:
5. An inaccurate alert message can be generated in the following scenario
(except in the case of a lockup). However, if a hardware event (or heartbeat)
occurs just as the system is transitioning into a G0 state, the hardware continues to
send the message even though the system is in a G0 state (and the status bits may
indicate this).
These messages are sent via the SMBus. The ICH7 abides by the SMBus rules
associated with collision detection. It delays starting a message until the bus is idle,
and detects collisions. If a collision is detected the ICH7 waits until the bus is idle,
and tries again.
interfere with the LAN device driver from working properly. The alerts reset part of
the LAN controller and would prevent an operating system’s device driver from
sending or receiving some messages.
assumed to have broken hardware (bad power supply, short circuit on some bus,
etc.), and is beyond ICH7’s recovery mechanisms.
— The processor has initiated an alert using the SEND_NOW bit
— During the alert, the THRM#, INTRUDER# or GPIO11 changes state
— The system then goes to a non-S0 state.
— The system successfully boots after a second watchdog Timeout occurs.
— PWROK goes low (typically due to a reset button press) or a power button
— An alert message indicating that the processor is missing or locked up is
override occurs (before the SECOND_TO_STS bit is cleared).
generated with a new sequence number.
Field
shows the data included in the Alert on LAN messages.
1 = This bit is set if the intruder detect bit is set (INTRD_DET).
1 = This bit is set if the Intel
1 = This bit is set if the processor failed to fetch its first instruction.
1 = This bit is set when software writes a 1 to the SEND_NOW bit.
1 = First BIOS fetch returned a value of FFh, indicating that the
Firmware Hub has not yet been programmed (still erased).
1 = This bit is set when GPIO11 signal is high.
0 = This bit is cleared when GPIO11 signal is low.
An event message is triggered on an transition of GPIO11.
®
Comment
ICH7 THERM# input signal is asserted.
Intel
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ICH7 Family Datasheet
Functional Description