NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 606
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NH82801GHM S L8YR
Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet
1.NH82801GHM_S_L8YR.pdf
(848 pages)
Specifications of NH82801GHM S L8YR
Lead Free Status / RoHS Status
Compliant
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15.1.13
15.1.14
606
SCMD_BAR—Secondary Command Block Base Address
Register (IDE D31:F1)
Address Offset: 18h
Default Value:
NOTE: This 4-byte I/O space is used in native mode for the Secondary Controller’s Command
SCNL_BAR—Secondary Control Block Base Address
Register (IDE D31:F1)
Address Offset: 1Ch
Default Value:
NOTE: This 4-byte I/O space is used in native mode for the Secondary Controller’s Command
31:16
31:16
15:3
15:2
2:1
Bit
Bit
0
1
0
Block.
Block.
Reserved
Base Address — R/W. Base address of the I/O space (8 consecutive I/O locations). If
this register is programmed, the programmed value must not be less than 100h.
Reserved
Resource Type Indicator (RTE) — RO. Hardwired to 1 indicating a request for I/O space.
Reserved
Base Address — R/W. Base address of the I/O space (4 consecutive I/O locations). If
this register is programmed, the programmed value must not be less than 100h.
Reserved
Resource Type Indicator (RTE) — RO. Hardwired to 1 indicating a request for I/O space.
00000001h
00000001h
–
–
1Bh
1Fh
Description
Description
Attribute:
Size:
Attribute:
Size:
IDE Controller Registers (D31:F1)
Intel
R/W, RO
32 bits
R/W, RO
32 bits
®
ICH7 Family Datasheet
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