NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 699

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NH82801GHM S L8YR

Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801GHM S L8YR

Lead Free Status / RoHS Status
Compliant
PCI Express* Configuration Registers (Desktop and Mobile Only)
18.1.56
Intel
®
ICH7 Family Datasheet
UEM — Uncorrectable Error Mask
(PCI Express—D28:F0/F1/F2/F3/F4/F5)
Address Offset: 148h
Default Value:
When set, the corresponding error in the UES register is masked, and the logged error
will cause no action. When cleared, the corresponding error is enabled.
31:21
11:5
Bit
20
19
18
17
16
15
14
13
12
Reserved
Unsupported Request Error Mask (URE) — R/WO.
0 = The corresponding error in the UES register (D28:F0/F1/F2/F3/F4/F5:144) is
1 = The corresponding error in the UES register (D28:F0/F1/F2/F3/F4/F5:144) is
ECRC Error Mask (EE) — RO. ECRC is not supported.
Malformed TLP Mask (MT) — R/WO.
0 = The corresponding error in the UES register (D28:F0/F1/F2/F3/F4/F5:144) is
1 = The corresponding error in the UES register (D28:F0/F1/F2/F3/F4/F5:144) is
Receiver Overflow Mask (RO) — R/WO.
0 = The corresponding error in the UES register (D28:F0/F1/F2/F3/F4/F5:144) is
1 = The corresponding error in the UES register (D28:F0/F1/F2/F3/F4/F5:144) is
Unexpected Completion Mask (UC) — R/WO.
0 = The corresponding error in the UES register (D28:F0/F1/F2/F3/F4/F5:144) is
1 = The corresponding error in the UES register (D28:F0/F1/F2/F3/F4/F5:144) is
Completion Abort Mask (CA) — R/WO.
0 = The corresponding error in the UES register (D28:F0/F1/F2/F3/F4/F5:144) is
1 = The corresponding error in the UES register (D28:F0/F1/F2/F3/F4/F5:144) is
Completion Timeout Mask (CT) — R/WO.
0 = The corresponding error in the UES register (D28:F0/F1/F2/F3/F4/F5:144) is
1 = The corresponding error in the UES register (D28:F0/F1/F2/F3/F4/F5:144) is
Flow Control Protocol Error Mask (FCPE) — RO. Flow Control Protocol Errors not
supported.
Poisoned TLP Mask (PT) — R/WO.
0 = The corresponding error in the UES register (D28:F0/F1/F2/F3/F4/F5:144) is
1 = The corresponding error in the UES register (D28:F0/F1/F2/F3/F4/F5:144) is
Reserved
enabled.
masked.
enabled.
masked.
enabled.
masked.
enabled.
masked.
enabled.
masked.
enabled.
masked.
enabled.
masked.
00000000h
14Bh
Description
Attribute:
Size:
R/WO, RO
32 bits
699

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