NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 376

• Manufacturer Part Number: NH82801GHM S L8YR
• Manufacturer: Intel

Specifications of NH82801GHM S L8YR

• Lead Free Status / RoHS Status: Compliant

10.1.24
10.1.25
376
GEN3_DEC—LPC I/F Generic Decode Range 3Register
(LPC I/F—D31:F0)
Offset Address: 8Ch
Default Value:
GEN4_DEC—LPC I/F Generic Decode Range 4Register
(LPC I/F—D31:F0)
Offset Address: 90h
Default Value:
31:24
23:18
31:24
23:18
17:16
17:16
15:2
15:2
Bit
Bit
1
0
1
0
Reserved
Generic I/O Decode Range Address[7:2] Mask: A ‘1’ in any bit position indicates
that any value in the corresponding address bit in a received cycle will be treated as a
match. The corresponding bit in the Address field, below, is ignored. The mask is only
provided for the lower 6 bits of the DWord address, allowing for decoding blocks up to
256 bytes in size.
Reserved
Generic I/O Decode Range 3Base Address (GEN3_BASE) — R/W.
NOTE: The Intel
Reserved
Generic Decode Range 3Enable (GEN3_EN) — R/W.
0 = Disable.
1 = Enable the GEN3 I/O range to be forwarded to the LPC I/F
Reserved
Generic I/O Decode Range Address[7:2] Mask: A ‘1’ in any bit position indicates
that any value in the corresponding address bit in a received cycle will be treated as a
match. The corresponding bit in the Address field, below, is ignored. The mask is only
provided for the lower 6 bits of the DWord address, allowing for decoding blocks up to
256 bytes in size.
Reserved
Generic I/O Decode Range 4Base Address (GEN4_BASE) — R/W.
NOTE: The Intel
Reserved
Generic Decode Range 4Enable (GEN4_EN) — R/W.
0 = Disable.
1 = Enable the GEN4 I/O range to be forwarded to the LPC I/F
00000000h
00000000h
–
–
®
®
93h
8Eh
ICH7 does not provide decode down to the word or byte level.
ICH7 does not provide decode down to the word or byte level.
Description
Description
Attribute:
Size:
Power Well:
Attribute:
Size:
Power Well:
LPC Interface Bridge Registers (D31:F0)
Intel
R/W
32 bit
Core
R/W
32 bit
Core
®
ICH7 Family Datasheet