NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 644

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NH82801GHM S L8YR

Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801GHM S L8YR

Lead Free Status / RoHS Status
Compliant
16.2.10
644
NOTE: Reads across DWord boundaries are not supported.
CAS—Codec Access Semaphore Register (Audio—D30:F2)
I/O Address:
Default Value:
Lockable:
NOTE: Reads across DWord boundaries are not supported.
7:1
Bit
Bit
2
1
0
0
Modem Out Interrupt (MOINT) — RO.
0 = When the specific status bit is cleared, this bit will be cleared.
1 = One of the modem out channel interrupts status bits has been set.
Modem In Interrupt (MIINT) — RO.
0 = When the specific status bit is cleared, this bit will be cleared.
1 = One of the modem in channel interrupts status bits has been set.
GPI Status Change Interrupt (GSCI) — R/WC.
0 = Software clears this bit by writing a 1 to it.
1 = This bit reflects the state of bit 0 in slot 12, and is set when bit 0 of slot 12 is set.
This bit is not affected by AC ‘97 Audio Function D3
Reserved.
Codec Access Semaphore (CAS) — R/W (special). This bit is read by software to
check whether a codec access is currently in progress.
0 = No access in progress.
1 = The act of reading this register sets this bit to 1. The driver that read this bit can
This indicates that one of the GPI’s has changed state, and that the new values are
available in slot 12.
then perform an I/O access. Once the access is completed, hardware automatically
clears this bit.
NABMBAR + 34h
00h
No
AC ’97 Audio Controller Registers (D30:F2) (Desktop and Mobile Only)
Description
Description
Attribute:
Size:
Power Well:
HOT
to D0 Reset.
Intel
R/W (special)
8 bits
Core
®
ICH7 Family Datasheet

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