NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 68

• Manufacturer Part Number: NH82801GHM S L8YR
• Manufacturer: Intel

Specifications of NH82801GHM S L8YR

• Lead Free Status / RoHS Status: Compliant

Table 2-13. Processor Interface Signals (Sheet 3 of 3)
2.14
Table 2-14. SM Bus Interface Signals
2.15
Table 2-15. System Management Interface Signals
68
SMBus Interface
System Management Interface
(Mobile/Ultra
SMLINK[1:0]
SMBALERT# /
LINKALERT#
Mobile Only)
INTRUDER#
CPUPWRGD
and Mobile
and Mobile
/ GPIO49
A20GATE
DPSLP#
(Desktop
(Desktop
(Desktop
SMBDATA
Name
Name
SMBCLK
Only)
Only)
Only)
/ TP2
GPIO11
Name
Type
Type
I/OD
I/OD
O
O
I
I
Type
I/OD
I/OD
I
A20 Gate: A20GATE is from the keyboard controller. The signal acts as an
alternative method to force the A20M# signal active. It saves the external
OR gate needed with various other chipsets.
CPU Power Good: This signal should be connected to the processor’s
PWRGOOD input to indicate when the CPU power is valid. This is an output
signal that represents a logical AND of the ICH7’s PWROK and VRMPWRGD
signals.
This signal may optionally be configured as a GPIO.
Deeper Sleep: DPSLP# is asserted by the ICH7 to the processor. When
the signal is low, the processor enters the deep sleep state by gating off
the processor core clock inside the processor. When the signal is high
(default), the processor is not in the deep sleep state.
Intruder Detect: This signal can be set to disable the system if the
chasis is detected open. This signal’s status is readable, so it can be
used like a GPIO if the Intruder Detection is not needed.
System Management Link: These signals provide a SMBus link to
optional external system management ASIC or LAN controller. External
pull-ups are required. Note that SMLINK0 corresponds to an SMBus
clock signal, and SMLINK1 corresponds to an SMBus Data signal.
SMLink Alert: This signal is an output of the integrated LAN and input
to either the integrated ASF or an external management controller in
order for the LAN’s SMLINK slave to be serviced.
SMBus Data: External pull-up resistor is required.
SMBus Clock: External pull-up resistor is required.
SMBus Alert: This signal is used to wake the system or generate
SMI#. If not used for SMBALERT#, it can be used as a GPIO.
Description
Description
Description
Intel
®
ICH7 Family Datasheet
Signal Description