NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 318
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NH82801GHM S L8YR
Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet
1.NH82801GHM_S_L8YR.pdf
(848 pages)
Specifications of NH82801GHM S L8YR
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7:4
Bit
9
8
3
Software Generated Interrupt (SI) — WO.
0 = No Effect.
1 = Setting this bit causes the LAN controller to generate an interrupt.
Interrupt Mask (IM) — R/W. This bit enables or disables the LAN controller’s
assertion of the INTA# signal. This bit has higher precedence that the Specific Interrupt
Mask bits and the SI bit.
0 = Enable the assertion of INTA#.
1 = Disable the assertion of INTA#.
Command Unit Command (CUC) — R/W. Valid values are listed below. All other
values are Reserved.
0000 = NOP: Does not affect the current state of the unit.
0001 = CU Start: Start execution of the first command on the CBL. A pointer to the
0010 = CU Resume: Resume operation of the Command unit by executing the next
0011 = CU HPQ Start: Start execution of the first command on the high priority CBL.
0100 = Load Dump Counters Address: Indicates to the device where to write dump
0101 = Dump Statistical Counters: Tells the device to dump its statistical counters
0110 = Load CU Base: The device’s internal CU Base Register is loaded with the value
0111 = Dump and Reset Statistical Counters: Indicates to the device to dump its
1010 = CU Static Resume: Resume operation of the Command unit by executing the
1011 = CU HPQ Resume: Resume execution of the first command on the HPQ CBL.
Reserved
first CB of the CBL should be placed in the SCB General Pointer before issuing
this command. The CU Start command should only be issued when the CU is in
the Idle or Suspended states (not when the CU is in the active state), and all of
the previously issued Command Blocks have been processed and completed by
the CU. Sometimes it is only possible to determine that all Command Blocks are
completed by checking that the Complete bit is set in all previously issued
Command Blocks.
command. This command will be ignored if the CU is idle.
A pointer to the first CB of the HPQ CBL should be placed in the SCB General
POinter before issuing this command.
data when using the Dump Statistical Counters or Dump and Reset Statistical
Counters commands. This command must be executed at least once before any
usage of the Dump Statistical Counters or Dump and Reset Statistical Counters
commands. The address of the dump area must be placed in the General
Pointer register.
to the area designated by the Load Dump Counters Address command.
in the CSB General Pointer.
statistical counters to the area designated by the Load Dump Counters Address
command, and then to clear these counters.
next command. This command will be ignored if the CU is idle. This command
should be used only when the CU is in the Suspended state and has no pending
CU Resume commands.
this command will be ignored if the HPQ was not started.
LAN Controller Registers (B1:D8:F0) (Desktop and Mobile Only)
Description
Intel
®
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