NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 560

• Manufacturer Part Number: NH82801GHM S L8YR
• Manufacturer: Intel

Specifications of NH82801GHM S L8YR

• Lead Free Status / RoHS Status: Compliant

13.1.29
560
ACCESS_CNTL—Access Control Register
(USB EHCI—D29:F7)
Address Offset:
Default Value:
7:1
Bit
Bit
0
3
2
1
0
Reserved
WRT_RDONLY — R/W. When set to 1, this bit enables a select group of normally read-
only registers in the EHC function to be written by software. Registers that may only be
written when this mode is entered are noted in the summary tables and detailed
description as “Read/Write-Special”. The registers fall into two categories:
1.
2.
SMI on Periodic Enable — R/W.
0 = Disable.
1 = Enable. When this bit is 1 and SMI on Periodic is 1, then the host controller will
SMI on CF Enable — R/W.
0 = Disable.
1 = Enable. When this bit is 1 and SMI on CF is 1, then the host controller will issue an
SMI on HCHalted Enable — R/W.
0 = Disable.
1 = Enable. When this bit is a 1 and SMI on HCHalted is 1, then the host controller will
SMI on HCReset Enable — R/W.
0 = Disable.
1 = Enable. When this bit is a 1 and SMI on HCReset is 1, then host controller will issue
issue an SMI.
SMI.
issue an SMI.
an SMI.
System-configured parameters, and
Status bits
80h
00h
Description
Description
Attribute:
Size:
EHCI Controller Registers (D29:F7)
Intel
R/W
8 bits
®
ICH7 Family Datasheet