NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 656

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NH82801GHM S L8YR

Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801GHM S L8YR

Lead Free Status / RoHS Status
Compliant
Table 17-3. Modem Registers
Note:
656
NOTE:
1.
Internal reset as a result of D3
except the registers shared with the AC ’97 audio controller (GCR, GSR, CASR). All
resume well registers will not be reset by the D3
Core well registers and bits not reset by the D3
Resume well registers and bits will not be reset by the D3
00h–03h
06h–07h
08h–09h
10h–13h
16h–17h
18h–19h
3Ch–3Fh
40h–43h
• offset 3Ch
• offset 40h
• offset 44h – Codec Access Semaphore Register (CAS)
• offset 40h
Offset
04h
05h
0Ah
0Bh
14h
15h
1Ah
1Bh
44h
MI = Modem in channel; MO = Modem out channel
MO_BDBAR
Mnemonic
MI_BDBAR
GLOB_CNT
GLOB_STA
MI_PICB
MI_PICB
MO_CIV
MO_PIV
MO_LVI
MI_CIV
MI_PIV
MO_SR
MO_CR
MI_LVI
MI_SR
MI_CR
CAS
43h – bits [29,15,11:10] Global Status (GLOB_STA)
43h – bits [17:16] Global Status (GLOB_STA)
3Fh – bits [6:0] Global Control (GLOB_CNT)
Modem In Buffer Descriptor List Base
Address
Modem In Current Index Value
Modem In Last Valid Index
Modem In Status
Modem In Position In Current Buffer
Modem In Prefetch Index Value
Modem In Control
Modem Out Buffer Descriptor List Base
Address
Modem Out Current Index Value
Modem Out Last Valid
Modem Out Status
Modem In Position In Current Buffer
Modem Out Prefetched Index
Modem Out Control
Global Control
Global Status
Codec Access Semaphore
AC ’97 Modem Controller Registers (D30:F3) (Desktop and Mobile Only)
HOT
to D0 transition will reset all the core well registers
Name
HOT
HOT
to D0 transition:
to D0 transition.
HOT
Intel
00000000h
00000000h
00000000h
00300000h
to D0 transition:
Default
0001h
0000h
0001h
0000h
®
00h
00h
00h
00h
00h
00h
00h
00h
00h
ICH7 Family Datasheet
R/WC, RO
R/WC, RO
RO, R/W,
(special)
(special)
(special)
(special)
Access
R/WC
R/W,
R/W,
R/W,
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO

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