NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 171
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NH82801GHM S L8YR
Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet
1.NH82801GHM_S_L8YR.pdf
(848 pages)
Specifications of NH82801GHM S L8YR
Lead Free Status / RoHS Status
Compliant
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Functional Description
5.14.10.1
Table 5-36. Write Only Registers with Read Paths in ALT Access Mode (Sheet 1 of 2)
Intel
Addr
I/O
00h
01h
02h
03h
04h
05h
06h
07h
®
ICH7 Family Datasheet
# of
Rds
2
2
2
2
2
2
2
2
Write Only Registers with Read Paths in ALT Access Mode
The registers described in
number field in the table indicates which register will be returned per access to that
port.
Access
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
Restore Data
DMA Chan 0 base address low
byte
DMA Chan 0 base address high
byte
DMA Chan 0 base count low
byte
DMA Chan 0 base count high
byte
DMA Chan 1 base address low
byte
DMA Chan 1 base address high
byte
DMA Chan 1 base count low
byte
DMA Chan 1 base count high
byte
DMA Chan 2 base address low
byte
DMA Chan 2 base address high
byte
DMA Chan 2 base count low
byte
DMA Chan 2 base count high
byte
DMA Chan 3 base address low
byte
DMA Chan 3 base address high
byte
DMA Chan 3 base count low
byte
DMA Chan 3 base count high
byte
Data
Table 5-36
have read paths in ALT access mode. The access
Addr
I/O
40h
41h
42h
70h
C4h
C6h
C8h
# of
Rds
7
1
1
1
2
2
2
Access
1
2
3
4
5
6
7
1
2
1
2
1
2
Restore Data
Timer Counter 0 status, bits
[5:0]
Timer Counter 0 base count
low byte
Timer Counter 0 base count
high byte
Timer Counter 1 base count
low byte
Timer Counter 1 base count
high byte
Timer Counter 2 base count
low byte
Timer Counter 2 base count
high byte
Timer Counter 1 status, bits
[5:0]
Timer Counter 2 status, bits
[5:0]
Bit 7 = NMI Enable,
Bits [6:0] = RTC Address
DMA Chan 5 base address low
byte
DMA Chan 5 base address
high byte
DMA Chan 5 base count low
byte
DMA Chan 5 base count high
byte
DMA Chan 6 base address low
byte
DMA Chan 6 base address
high byte
Data
171
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