NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 811

• Manufacturer Part Number: NH82801GHM S L8YR
• Manufacturer: Intel

Specifications of NH82801GHM S L8YR

• Lead Free Status / RoHS Status: Compliant

Electrical Characteristics
Table 23-18. AC ’97
Table 23-19. LPC Timing
Table 23-20. Miscellaneous Timings
1
Intel
®
ICH7 Family Datasheet
1. Audio link operating in AC ‘97 mode. (Desktop and Mobile Only)
2. Audio link operating in Intel High Definition Audio mode.
NOTES:
Sym
Sym
Sym
t140
t141
t142
t143
t144
t145
t146
t150
t151
t152
t153
t154
t155
t156
t157
t160
t161
t162
t163
t164
t165
ACZ_SDIN[2:0] Setup to Falling Edge of
ACZ_BIT_CLK
ACZ_SDIN[2:0] Hold from Falling Edge of
ACZ_BIT_CLK
ACZ_SYNC, ACZ_SDOUT valid delay from rising
edge of ACZ_BIT_CLK
Time duration for which ACZ_SDOUT is valid
before ACZ_BIT_CLK edge.
Time duration for which ACZ_SDOUT is valid
after ACZ_BIT_CLK edge.
Setup time for ACZ_SDIN[2:0] at rising edge of
ACZ_BIT_CLK
Hold time for ACZ_SDIN[2:0] at rising edge of
ACZ_BIT_CLK
LAD[3:0] Valid Delay from PCICLK Rising
LAD[3:0] Output Enable Delay from PCICLK
Rising
LAD[3:0] Float Delay from PCICLK Rising
LAD[3:0] Setup Time to PCICLK Rising
LAD[3:0] Hold Time from PCICLK Rising
LDRQ[1:0]# Setup Time to PCICLK Rising
LDRQ[1:0]# Hold Time from PCICLK Rising
LFRAME# Valid Delay from PCICLK Rising
SERIRQ Setup Time to PCICLK Rising
SERIRQ Hold Time from PCICLK Rising
RI#, EXTSMI#, GPIO, USB Resume Pulse
Width
SPKR Valid Delay from OSC Rising
SERR# Active to NMI Active
IGNNE# Inactive from FERR# Inactive
/
Intel
®
High Definition Audio Timing
Parameter
Parameter
Parameter
Min
12
—
Min
2
2
7
0
0
2
—
—
—
7
0
2
Min
10
10
15
—
7
7
0
Max
Max
11
28
12
—
—
—
—
—
200
200
230
—
—
—
Max
15
—
—
—
—
—
—
Units
RTCCLK
Units
ns
ns
ns
ns
ns
ns
ns
ns
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
Notes
Notes
1
1
1
2
2
2
2
Figures
Figures
Figures
23-30
23-30
23-30
23-31
23-31
23-31
23-31
23-2
23-6
23-4
23-3
23-3
23-3
23-3
23-2
23-3
23-3
23-5
23-2
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