NH82801GHM S L8YR Intel, NH82801GHM S L8YR Datasheet - Page 404

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NH82801GHM S L8YR

Manufacturer Part Number
NH82801GHM S L8YR
Description
Manufacturer
Intel
Datasheet

Specifications of NH82801GHM S L8YR

Lead Free Status / RoHS Status
Compliant
10.5
10.5.1
Table 10-4. APIC Direct Registers (LPC I/F—D31:F0)
Table 10-5. APIC Indirect Registers (LPC I/F—D31:F0)
10.5.2
.
404
Advanced Programmable Interrupt Controller
(APIC)(D31:F0)
APIC Register Map (LPC I/F—D31:F0)
The APIC is accessed via an indirect addressing scheme. Two registers are visible by
software for manipulation of most of the APIC registers. These registers are mapped
into memory space. The registers are shown in
Register. When accessing these registers, accesses must be done one DWord at a time.
For example, software should not access byte 2 from the Data register before accessing
bytes 0 and 1. The hardware will not attempt to recover from a bad programming
model in this case.
IND—Index Register (LPC I/F—D31:F0)
Memory Address FEC0_0000h
Default Value:
The Index Register will select which APIC indirect register to be manipulated by
software. The selector values for the indirect registers are listed in
will program this register to select the desired APIC internal register
Table 10-5
FECO_0040h
FEC0_0000h
FEC0_0010h
7:0
Bit
Address
Index
02–0F
10–11
12–13
3E–3F
40–FF
00
01
...
APIC Index — R/W. This is an 8-bit pointer into the I/O APIC register table.
lists the registers which can be accessed within the APIC via the Index
Mnemoni
REDIR_TBL23
REDIR_TBL0
REDIR_TBL1
Mnemonic
00h
EOIR
DAT
IND
c
VER
ID
...
Index
Data
EOI
Identification
Version
Reserved
Redirection Table 0
Redirection Table 1
...
Redirection Table 23
Reserved
Register Name
Register Name
Description
Attribute:
Size:
Table
LPC Interface Bridge Registers (D31:F0)
10-4.
Intel
R/W
8 bits
®
Table
32 bits
32 bits
8 bits
Size
32 bits
32 bits
64 bits
64 bits
64 bits
ICH7 Family Datasheet
Size
...
10-5. Software
R/W, RO
R/W, RO
R/W, RO
Type
R/W
R/W
Type
WO
R/W
RO
RO
RO
...

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