pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 60

• Manufacturer Part Number: pc87591l
• Description: Lpc Mobile Embedded Controllers
• Manufacturer: National Semiconductor Corporation

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2.0 Signal/Pin Description and Configuration
Input to Output Echo Enable Register 1 and 2 (IOEE1 and IOEE2)
The IOEE1 and IOEE2 registers are read/write, byte-wide registers. They enable the echoing of some of the General-Pur-
pose Input ports, equipped with wake-up, to a specified output. The IOEE bits have an impact only when the output GPIO
is configured to its GPIO function. IOEE1 and IOEE2 are cleared (00
The format of IOEE1 is:
IOEE1 Location: 00 FF02
Type: R/W
Bit
Name
Reset
7-5
Bit
0
1
2
3
4
EEPA0.
0: Echo Disabled
1: Echo Enabled
EEPA1.
0: Echo Disabled
1: Echo Enabled
EEPA2.
0: Echo Disabled
1: Echo Enabled
EEPA3.
0: Echo Disabled
1: Echo Enabled
EEPA4.
0: Echo Disabled
1: Echo Enabled
Reserved.
7
0
Output Port
Table 9. GPIO Echo Functions Routing and Echo Enable Bit Assignments
IOPC0
IOPD3
IOPB0
IOPB1
IOPB2
IOPA0
IOPA1
IOPA2
IOPA3
IOPA4
16
Reserved
6
0
EEPC0 bit in IOEE2 register
EEPB0 bit in IOEE2 register
EEPB1 bit in IOEE2 register
EEPB2 bit in IOEE2 register
EEPD3 bit in IOEE2 register
EEPA0 bit in IOEE1 register
EEPA1 bit in IOEE1 register
EEPA2 bit in IOEE1 register
EEPA3 bit in IOEE1 register
EEPA4 bit in IOEE1 register
Echo Enable Bit
5
0
EEPA4
Description
60
4
0
(Continued)
16
IOPE7/CLKRUN/EXWINT46
) on reset.
IOPE6/LPCPD/EXWINT45
EEPA3
3
0
IOPC4/EXWINT22
IOPD0/EXWINT20
IOPD1/EXWINT21
IOPC6/EXWINT23
IOPD2/EXWINT24
IOPF6/PSCLK4
IOPF7/PSDAT4
IOPE4/SWIN
Input Port
EEPA2
2
0
EEPA1
1
0
EEPA0
Revision 1.07
0
0