pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 435
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pc87591l
Manufacturer Part Number
pc87591l
Description
Lpc Mobile Embedded Controllers
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87591L.pdf
(437 pages)
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Revision 1.07
B.2
The flash protection word is used to protect the contents of the on-chip flash from being altered. It also prevents the system
from executing from an erased flash and sets various system defaults. The following are examples of common settings for the
protection word. The protection word should be written into the flash as the last operation after updating the flash via the JTAG.
The protection word may be written by a write operation, using the programing tool to address 00FE
(block 2). Note that the protection word must be updated in all operating environments (DEV, OBD, PROG and IRE).
Example 1
Core boot block size is 4 Kbytes
The value that should be written to the protection word is 7F9E
Example 2
Same as Example 1, but for production version, once all debugging is completed. Change bits 9-7 from 111 to 000. Thus
the value that should be written to the protection word is 7C1E
Example 3
The value that should be written to the protection word is BF9D
Example 4
The value that should be written to the protection word is FFBE
Software for Hardware Interface
— Bit 3-0 (Core Boot Block): 1110
Shared BIOS using an expansion memory
— Bit 4 (Host Boot Block): 1
— Bit 6 (Force MBTA Zero): 0
RTC may be accessed by the host (at default)
— Bit 5 (RTC Lock Default): 0
Flash is not protected to allow debug
— Bits 9-7 (Flash Contents Protect): 111
Use RESET2 on pin IOPB7/RING/PFAIL/RESET2
— Bits 15-14 (RST2EN): 01
Core boot block size is 8 Kbytes
— Bit 3-0 (Core Boot Block): 1101
Shared BIOS using an expansion memory
— Bit 4 (Host Boot Block): 1
— Bit 6 (Force MBTA Zero): 0
RTC may be accessed by the host (at default)
— Bit 5 (RTC Lock Default): 0
Flash is not protected to allow debug
— Bits 9-7 (Flash Contents Protect): 111
Use RESET2 on pin IOPD2/EXWINT24/RESET2
— Bits 15-14 (RST2EN): 10
Core boot block size is 4 Kbytes
— Bit 3-0 (Core Boot Block): 1110
Shared BIOS using an expansion memory
— Bit 4 (Host Boot Block): 1
— Bit 6 (Force MBTA Zero): 0
After reset, RTC may be accessed only by the core, and host access is blocked until host access is enabled by the
core.
— Bit 5 (RTC Lock Default): 1
Flash is not protected to allow debug
— Bits 9-7 (Flash Contents Protect): 111
Do not use RESET2 (only RESET1 is in use)
— Bits 15-14 (RST2EN): 11
PROTECTION INFORMATION
(Continued)
435
16
16
16
16
(binary 0111 1100 0001 1110).
(binary 0111 1111 1001 1110).
(binary 1011 1111 1001 1101).
(binary 1111 1111 1011 1110)..
16
in the information block
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