pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 215

• Manufacturer Part Number: pc87591l
• Description: Lpc Mobile Embedded Controllers
• Manufacturer: National Semiconductor Corporation

Revision 1.07
Embedded Controller Modules
ACM Timing Control Register (ACMTIM)
This register controls the sampling delay for the voltage level and compare out data; it also controls the division of the trigger
signal. ACMTIM is set to 37
Location: 00 FD44
Type: R/W
Bit
Name
Reset
2-0
5-4
7-6
Bit
3
SMPDLY (Data Sampling Delay). Compensates for the settling time of the D/A converter and the input
comparators. To calculate the required delay value, see “Sampling Delay” on page 210.
Bits
2 1 0 Period
0 0 0:
0 0 1:
0 1 0:
0 1 1:
1 0 0:
1 0 1:
1 1 0:
1 1 1:
___________________________
1. The Settling and Compare periods are in clock cycles.
2. Conversion step time is equal to Settling Period + Compare Period
Reserved.
T0DIV (Trigger Signal Division Factor). Controls the division of the T0IN trigger signal in Low Power Threshold
Comparison mode. A higher division factor gives a lower power consumption in Idle operation mode (see
Section 4.17 on page 235). T0IN frequency is separately set (see Section 4.10 on page 164).
Bits
5 4
0 0:
0 1:
1 0:
1 1:
Reserved.
T0In Division Factor
16
32
64
128 (default)
Settling Compare
16
1
1
2
2
2
2
3
3
7
0
Reserved
1
Period
10
15
20
25
30
35
45
55
16
on reset.
6
0
1
Core Freq
5.5MHz
8.5 MHz
11.5 MHz
14.2 MHz
16.5 MHz
20.0 MHz
20.0 MHz
20.0 MHz (default)
Max
(Continued)
2
5
1
T0DIV
Description
215
4
1
Reserved
3
0
2
1
SMPDLY
1
1
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0
1