pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 123

• Manufacturer Part Number: pc87591l
• Description: Lpc Mobile Embedded Controllers
• Manufacturer: National Semiconductor Corporation

Revision 1.07
Embedded Controller Modules
Quasi-Bidirectional Drivers
The quasi-bidirectional drivers have an open-drain output (Q2), an internal pull-up (Q3) and a low-impedance pull-up(Q1).
Q2 pulls the signal low whenever the output buffer data is “0”. The weak pull-up (Q3) is active whenever the output buffer
data is “1” and WPUEN in PSCON register is set (1). The low impedance pull-up is active whenever the PC87591x changes
the output data buffer from “0” to “1”, thereby reducing the low-to-high transition time. The length of time that the low-imped-
ance pull-up is active is determined by HDRV field in PSCON register. A schematic description of this output driver appears
in Figure 39.
Interrupt Signals
The firmware can use an interrupt-driven scheme to implement the PS/2 device interface. When the shift mechanism is not
in use, four interrupts are available (PSINT4-1), one for each channel. (PSINT4 is not connected to the ICU as a separate
input, the MIWU PSCLK4 input should be used instead). When the shift mechanism is in use, only one interrupt signal is
used (PSINT1). More details on the use of the interrupts are provided in Section 4.6.4 on page 125. Figure 40 illustrates the
interrupt scheme with the associated enable bits.
Input Buffer Data
Output Buffer Data
PS/2 I/F
Registers
RCLK1
WDAT1
RDAT1
CLK1
ENSM
Channel 1
Channel 2
EN1
Channel 3
EN2
Channel 4
Figure 38. PS/2 Interface Functional Diagram
EN3
EN4
Rising Edge
DATI1
Figure 39. Quasi-Bidirectional Buffer
Detector
DATI2
(Continued)
DATI3
DATI4
DATO1
DATO2
DATO3
Shift Mechanism
DATO4
123
CLKI1
CLKI2
WPUEN
CLKI3
CLKI4
CLKO1
CLKO2
CLKO3
CLKO4
Q1
Q2
+V
Q3
CC
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PSDAT1
PSCLK1