pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 262

• Manufacturer Part Number: pc87591l
• Description: Lpc Mobile Embedded Controllers
• Manufacturer: National Semiconductor Corporation

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Embedded Controller Modules
4.19.8 TAP Data Registers, Flash Interface
This section describes the flash interface registers available to the host through the flash interface. The bit ordering is as
described in “TAP Data Registers, Debugger Interface” on page 260.
Flash Control and Status Register (FL_CT_ST)
FL_CT_ST is a shift register that enables reading from the Flash Status register and writing to the Flash Control register.
The Flash Status register is read in Capture-DR state; the Flash Control register is updated in Update-DR state. The con-
nection of the register to the serial chain is shown in Figure 87. The Control and Status registers are reset at Power-Up and
TAP resets only.
Flash Status
Type: Varies per bit
Bit
Name
Reset
Bit
Name
Reset
Bit
0
1
2
3
R/W1C FMEERR (Flash Memory Erase Error). Indicates an error in erasing to the flash. It is cleared by
R/W1C FMPERR (Flash Memory Program Error). Indicates an error in writing to the flash. It is cleared by
Type
RO
RO
FMPRGE
JTFIE
writing 1 to FMEERR bit in the Control register. This bit may be cleared only when FMBUSY bit is
cleared (0).
0: No program error detected (default)
1: An error occurred during erase
This bit may be cleared only when FMBUSY bit is cleared (0).
writing 1 to FMPERR bit in the Control register. This bit may be cleared only when FMBUSY bit is
cleared (0).
0: No program error detected (default)
1: An error occurred during program
FMBUSY (Flash Memory Busy).
0: The embedded flash is ready to accept operations if no error flag is set
1: The embedded flash is not accessible because the PC87591x clocks are not ready or the embedded
FMBFULL (Flash Double-Buffer Full).
0: There is at least one empty word in the flash double buffer
1: The double-buffer is full
15
7
0
0
flash is busy programing or erasing
DISVRF
BLFF
14
6
0
0
Figure 87. Flash Control and Status Register
FLAEN
TDI
(Continued)
13
5
0
0
15
15
Flash Control Status
Reserved
FL_CR_ST
FMDERR
262
12
4
0
0
Description
FMBFULL
0
0
11
3
0
0
TDO
FMSPERE
FMBUSY
10
2
1
0
FMPERR
FMSERE
1
0
9
0
FMEERR
FMPERE
Revision 1.07
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0
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