pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 43
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pc87591l
Manufacturer Part Number
pc87591l
Description
Lpc Mobile Embedded Controllers
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87591L.pdf
(437 pages)
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Revision 1.07
2.0 Signal/Pin Description and Configuration
2.2.4
Core Bus Interface Unit (BIU)
A3-0
A19-8
A7-4
D7-4,
D3-0
D15-14,
D13-12,
D11-10,
D9-8
RD
SEL0
SEL1
SELIO
WR1
WR0
Signal
128-Pin
95-92
N/A
99-96
109-
102
N/A
110
N/A
N/A
112
N/A
111
LQFP
127-124
103-104
112-113
120-121
129-130
134-135
142-143
133-131,
128
147-144
141-138
149-148
156-155
4-3
28-27
150
173
174
152
48
151
176-Pin
LQFP
I/O
I/O
O
O
O
O
O
O
O
IN
Buffer
O
Type
O
O
O
O
O
O
T
2/12
/O
1/2
1/2
1/2
1/2
1/2
1/2
1/2
Power
Well
V
V
V
V
V
V
V
V
43
CC
CC
CC
CC
CC
CC
CC
CC
Address Bus, bits 0-19. Core external address
bus. Affected or used by any transaction on the
internal core-bus, including DMA transactions
and accesses to the internal memory.
Data bus, bits 0-15. Core external data bus.
Used for core access to external memory or I/O
devices. When accessing an 8-bit external
memory or I/O device, only D0-7 should be
used.
Read Control. Core external read strobe. Can
be used as output enable for external memory
of I/O devices.
Zone Select 0. Chip-select signal for external
memory devices mapped to zone 0.
Zone Select 1. Chip-select signal for external
memory devices mapped to zones 1 and 2
(Base Memory). Available in DEV environment
for off-chip emulation of the on-chip flash or
ROM. In IRE and OBD environments, zones 1
and 2 are mapped to the on-chip flash or ROM
and SEL1 output is inactive.
I/O Zone Select. Chip-select signal for external
I/O devices mapped to this zone. Can be used
for mapping off-chip I/O expansion devices to
the core address space.
Write Control 1 and 0. Indicates writes to bytes
1 and 0, respectively, of the BIU data bus.
(Continued)
Description
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