pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 349

• Manufacturer Part Number: pc87591l
• Description: Lpc Mobile Embedded Controllers
• Manufacturer: National Semiconductor Corporation

Revision 1.07
6.0 Host-Controlled Modules and Host Interface
6.1.11 Shared Memory Configuration
Logical Device 15 (0F
Table 59 lists the configuration registers that affect the shared memory functional block. The shared memory base address
registers point to the shared memory registers described in Section 5.3 on page 297. The memory space to which the shared
memory responds is defined by the configuration registers in the following sections. See “Standard Logical Device Config-
uration Register Definitions” on page 337 and Section 6.1.2 on page 340 for a detailed description of the other configuration
registers.
30
60
61
70
71
74
75
F4
F5
F6
F7
Index
16
16
16
16
16
16
16
16
16
16
16
30
60
61
62
63
70
71
74
75
Index
16
16
16
16
16
16
16
16
16
Activate. When bit 0 is cleared, the registers of this logical device are not
accessible.
Base Address MSB register.
Base Address LSB register. Bits 3-0 (for A3-A0) are read only, ‘0000’.
No interrupt assignment.
No interrupt assignment.
Report no DMA assignment.
Report no DMA assignment.
Shared Memory Configuration register.
Shared Memory Base Address High Byte register.
Shared Memory Base Address Low Byte register.
Shared Memory Size Configuration register.
Activate. See also bit 0 of the SIOCF1.
Base Address MSB register. Bits 7-3 (for A15-11) are read only, ‘00000’.
Base Address LSB register. Bits 2-0 are read only, ‘000’.
Command Base Address MSB register. Bits 7-3 (for A15-11) are read only,
‘00000’.
Command Base Address LSB. Bits 2-0 are read only, ‘100’.
KBD Interrupt Number and Wake-Up on IRQ Enable register.
KBD Interrupt Type. Bit 1 is read/write; other bits are read only.
Report no DMA assignment.
Report no DMA assignment.
16
) (Shared Memory) Configuration
Keyboard Configuration Register or Action
Configuration Register or Action
Table 59. Shared Memory Configuration Registers
Table 58. Keyboard Configuration Registers
349
(Continued)
Type
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
SHBM strap input
00
pending on the
16
value of the
Reset
00
00
60
00
64
01
03
04
04
or 09
Reset
00
00
00
00
00
04
04
00
00
00
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16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
, de-