pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 136

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pc87591l

Manufacturer Part Number
pc87591l
Description
Lpc Mobile Embedded Controllers
Manufacturer
National Semiconductor Corporation
Datasheet

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Embedded Controller Modules
Counter Clock Source Select
The clock source unit contains two clock source selectors that allow the clock source to be selected independently for each
of the two 16-bit counters from one of the following sources:
4.7.3
The timer/counter and action unit consists of two 16-bit counters, TnCNT1 and TnCNT2, in addition to two 16-bit reload/cap-
ture registers, TnCRA and TnCRB. The timers are down counters capable of triggering events on underflow detection (count
from 0000
ation modes described below.
Different interrupts can be triggered on certain conditions, and the functionality of the I/O pins changes depending on the
mode of operation. Therefore the interrupt control and the I/O control are an integral part of the timer/counter unit.
Operation Modes
The MFT16 can be configured to operate in any one of four modes, as summarized in Table 18 and described in this section.
Mode 1, PWM and Counter
PWM can be used to generate precise pulses of known width and duty cycle on the TAn pin. The timer is clocked by the
instruction clock. An underflow causes the timer register to be reloaded alternately from the TnCRA and TnCRB registers
and optionally causes TAn output to toggle. Thus, the values stored in TnCRA and TnCRB registers control the high and
low time of the signal produced on TAn. In PWM mode, timer/counter 2 can be used either as a simple system timer or as
an external event counter. The counter can be loaded by software with a specific value; the counter can then generate an
interrupt after the pre-programed number of external events have been received on TBn input.
Mode
1
2
3
4
No clock, in which case the counter is stopped
Prescaled system clock
External Event count based on TBn
Pulse Accumulate mode based on TBn
Slow Speed Clock i.e., 32.768 KHz
Pre-Scaler Output
Counter Clock
TBn
Timer/Counter and Action Unit
Dual input capture
PWM and system
Input capture and
Dual independent
and system timer
16
timer or external
event counter
Description
to FFFF
timer
timer
16
). In addition, it contains the mode control logic which allows the timer to operate in any of four oper-
Time base for first
Time base for first
Counter for PWM
Timer/Counter 1
Capture A and B
(TnCNT1)
time base
timer
timer
Figure 46. Pulse Accumulate Mode
(Continued)
Table 18. Operation Modes
value on TAn event
Reload/Capture A
Reload register for
Reload register for
Capture counter 1
Auto Reload A =
timer/counter 1
timer/counter 1
PWM time 1
136
(TnCRA)
Auto reload = PWM
value on TBn event
value on TBn event
Reload/Capture B
Reload register for
Capture counter 1
Capture counter 1
timer/counter 2
(TnCRB)
time 2
Capture B time base
System Timer or ex-
ternal event counter
Time base for sec-
Timer/Counter 2
System Timer
(TnCNT2)
ond timer
Revision 1.07

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