pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 155

• Manufacturer Part Number: pc87591l
• Description: Lpc Mobile Embedded Controllers
• Manufacturer: National Semiconductor Corporation

Revision 1.07
Embedded Controller Modules
The format shown in Figure 56 consists of one start bit, eight data bits (excluding parity) and one or two stop bits. If parity
bit generation is enabled by setting the PEN bit, a parity bit is generated and transmitted following the eight data bits.
The format shown in Figure 57 consists of one start bit, nine data bits and one or two stop bits. This format also supports
the USART attention feature. When operating in this format, all eight bits of UTBUF and URBUF are used for data. The ninth
data bit is transmitted and received using two bits in the control registers, called STPXB9 and RB9. Parity is not generated
or verified in this mode.
Baud Rate Generator
The Baud Rate Generator provides the basic baud clock from the system clock. The system clock is passed through a two-
stage divider chain consisting of a 5-bit baud rate pre-scaler (PSC) and an 11-bit baud rate divisor (DIV).
The correspondences between the 5-bit pre-scaler select (PSC) and pre-scaler factors are shown in Table 21.
2a
2b
2c
3a
2
3
1
1a
1b
1c
START
START
START
START
START
START
BIT
BIT
BIT
BIT
BIT
BIT
START
START
START
START
BIT
BIT
BIT
BIT
Figure 55. Seven Data Bit Frame Options
Figure 56. Eight Data Bit Frame Options
Figure 57. Nine Data Bit Frame Options
(Continued)
8-BIT DATA
7-BIT DATA
8-BIT DATA
8-BIT DATA
8-BIT DATA
9-BIT DATA
9-BIT DATA
7-BIT DATA
7-BIT DATA
7-BIT DATA
155
PA
PA
S
PA
2S
PA
S
S
2S
2S
S
S
2S
2S
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