pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 50
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pc87591l
Manufacturer Part Number
pc87591l
Description
Lpc Mobile Embedded Controllers
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87591L.pdf
(437 pages)
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2.0 Signal/Pin Description and Configuration
2.2.10 PS/2 Interface
2.2.11 Strap Configuration
PSCLK4-1
PSDAT4-1
BADDR1-0 95-94
ENV1-0
SHBM
TRIS
Signal
Signal
93-92
97
96
128-Pin
128-Pin
88, 86,
84, 82
89, 87,
85, 83
LQFP
LQFP
176-Pin
118,
116,
114,
110
119,
117,
115,
111
127-126
125-124
131
128
176-Pin
LQFP
LQFP
I/O
I/O IN
I/O IN
I/O
I
I
I
I
Buffer
Buffer
Type
IN
IN
IN
IN
Type
T
T
/O
/O
CS
CS
CS
CS
2/12
2/12
Power
Well
V
V
V
V
Power
Well
CC
CC
CC
CC
V
V
CC
CC
50
I/O Base Address. Sampled at V
reset to determine the base address of the
configuration Index-Data register pair as follows:
No pull-up resistor: 2E
10 K
10 K
Environment Select 1 and 0. Sampled at V
Power-Up reset to determine the device
operation environment, either IRE, OBD or DEV.
Each pin is pulled to 0 (set environment to IRE =
00) by an internal resistor or set to 1 by an
external 10 K
For further details refer to Section 2.3 on
page 53.
Shared Host BIOS Memory. Sampled at V
Power-Up reset to determine the state of the
shared Host BIOS memory. Pulled to 0 (disables
the shared host BIOS memory) by an internal
resistor or set to 1 by an external 10 K
resistor to enable the shared BIOS mode.
TRI-STATE. Forces the device to float all its
output and I/O pins (except for DAC outputs and
32KX2) if an external pull-up resistor is
connected. Sampled at V
PS/2 Channel 1 through 4 Clock signal.
PS/2 Channel 1 through 4 Data signal.
(Continued)
resistor on BADDR0:4E
resistor on BADDR1:Core defined
external pull-up
external pull-up
pull-up resistor.
Description
Description
16
-2F
CC
16
16
-4F
Power-Up reset.
16
CC
Power-Up
pull-up
CC
CC
Revision 1.07
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