pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 14

• Manufacturer Part Number: pc87591l
• Description: Lpc Mobile Embedded Controllers
• Manufacturer: National Semiconductor Corporation

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Table of Contents
4.17
4.18
4.19
4.16.4
4.16.5
4.16.6
4.16.7
POWER MANAGEMENT CONTROLLER (PMC) ................................................................... 235
4.17.1
4.17.2
4.17.3
4.17.4
4.17.5
HIGH-FREQUENCY CLOCK GENERATOR (HFCG) ............................................................. 239
4.18.1
4.18.2
4.18.3
4.18.4
4.18.5
4.18.6
4.18.7
THE DEBUGGER INTERFACE ............................................................................................... 248
4.19.1
4.19.2
Flash Access and Control .......................................................................................... 224
Parallel Flash Interface .............................................................................................. 226
Flash Protection ......................................................................................................... 226
Flash Interface Registers ........................................................................................... 228
Features .................................................................................................................... 235
The Core Domain Power Modes ............................................................................... 235
Switching Between Power Modes ............................................................................. 236
The Power Management Controller Status Register (PMCSR) ................................. 237
Usage Hints ............................................................................................................... 238
Features .................................................................................................................... 239
Functional Description ............................................................................................... 239
HFCG States ............................................................................................................. 240
The Programmable Pre-Scaler: Core Domain Clock Generation .............................. 242
State Transitions ........................................................................................................ 242
48 MHz Clock Monitor ............................................................................................... 243
Features .................................................................................................................... 248
Structure .................................................................................................................... 248
HFCG Registers ....................................................................................................... 243
(Continued)
Information Block Access Index Register (IBAI) ................................................ 228
Information Block Data Register (IBD) ............................................................... 229
Flash Core Write Protect Register 0 (FCWP0) .................................................. 229
Flash Memory Control Register (FLCR) ............................................................ 230
Flash Memory Status Register (FLSR) .............................................................. 231
Flash Memory Pre-Scaler Register (FLPSLR) ................................................... 231
Flash Memory Start Time Register (FLSTART) ................................................. 232
Flash Memory Transition Time Register (FLTRAN) .......................................... 232
Flash Memory Program Time Register (FLPROG) ............................................ 232
Flash Memory Page Erase Time Register (FLPERASE) ................................... 233
Flash Memory Section Erase Time Register (FLSERASE) ............................... 233
Flash Memory End Time Register (FLEND) ...................................................... 233
Flash Memory Section Erase End Time Register (FLSEND) ............................ 234
Flash Memory Recovery Time Register (FLRCV) ............................................. 234
Decreasing Power Consumption ....................................................................... 236
Increasing Activity .............................................................................................. 236
Power Mode Switch Protection .......................................................................... 237
PMC Enabled SuperI/O Disabled State ............................................................. 240
SuperI/O Enabled State ..................................................................................... 242
HFCG Register Map .......................................................................................... 243
HFCG Control Register 1 (HFCGCTRL1) .......................................................... 244
HFCGM Low Value Register (HFCGML) ........................................................... 245
HFCGM High Value Register (HFCGMH) ......................................................... 245
HFCGN Value Register (HFCGN) ..................................................................... 245
HFCGI Low Value Register (HFCGIL) ............................................................... 246
HFCGI High Value Register (HFCGIH) ............................................................. 246
HFCG Pre-Scaler Register (HFCGP) ................................................................ 246
HFCG Control Register 2 (HFCGCTRL2) .......................................................... 247
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Revision 1.07