pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 101
pc87591l
Manufacturer Part Number
pc87591l
Description
Lpc Mobile Embedded Controllers
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87591L.pdf
(437 pages)
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Revision 1.07
Embedded Controller Modules
4.3.4
For a summary of the abbreviations used for Register Type, see “Register Abbreviations and Access” on page 34.
ICU Register Map
Interrupt Vector Register (IVCT)
The IVCT register holds the vector number of the interrupt vector. IVCT is set to 10
Location: 00 FE00
Type: RO
NMI Status Register (NMISTAT)
The NMISTAT register holds the status of the current pending Non-Maskable Interrupt (NMI) requests. This register is cleared
on reset and each time its contents are read. Refer to the description of the PFAIL register below for additional details.
Location: 00 FE02
Type: RO
Bit
Name
Reset
Bit
Name
Reset
5-0
7-6
7-1
Bit
Bit
0
ICU Registers
INTVECT (Interrupt Vector). Contains the encoded value of the enabled pending interrupt with the highest
priority; the valid values range from 10
IVCT is read. It may contain invalid data when INTVECT is updated.
These bits return 0 when read.
EXT (External Non-Maskable Interrupt Request).
0: No external non-maskable interrupt request occurred
1: External non-maskable interrupt request occurred
Reserved.
16
16
7
0
0
7
0
IVCT
NMISTAT
PFAIL
ISTAT0
ISTAT1
IENAM0
IENAM1
IECLR0
IECLR1
Mnemonic
6
0
0
6
0
Interrupt Vector
NMI Status
Power Fail Interrupt Control and Status
Interrupt Status 0
Interrupt Status 1
Interrupt Enable and Mask 0
Interrupt Enable and Mask 1
Edge Interrupt Clear 0
Edge Interrupt Clear 1
(Continued)
5
0
5
0
16
to 2F
Register Name
16
Reserved
. Valid during an interrupt acknowledge core bus cycle in which
Description
Description
101
4
1
4
0
3
0
3
0
INTVECT
16
on reset.
0
2
0
2
Type
R/W
R/W
R/W
WO
WO
RO
RO
RO
RO
1
0
1
0
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EXT
0
0
0
0
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