pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 324

• Manufacturer Part Number: pc87591l
• Description: Lpc Mobile Embedded Controllers
• Manufacturer: National Semiconductor Corporation

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Host Controller Interface Modules
Wake-Up Events Enable Register (WK_EN0)
This register is set to 00
the PWUREQ signal is activated.
Location: Offset 02
Type: R/W
Bit
Name
Reset
5-4
Bit
Bit
0
1
2
3
6
7
0
1
2
3
RI1 Event Status.
0: Event not detected (default)
1: Event detected
RI2 Event Status.
0: Event not detected (default)
1: Event detected
Reserved.
RING Event Status. RING event detection, according to the RING detection mode enabled.
0: Event not detected (default)
1: Event detected
Reserved.
Software Event Status. This bit may work in two modes, as defined by HSECM bit in MSWCTL1 register (see
“MSWC Control Status Register 1 (MSWCTL1)” on page 329).
When HSECM is 0, writing 1 to Software Event Status bit inverts its value.
When HSECM is 1, writing 1 to Software Event Status bit sets it; the bit is cleared by a write of 1 to bit 6 in
MSHES0 register.
0: Event not active (default)
1: Event active
Module IRQ Event Status. This sticky bit shows the status of the module IRQ event detection.
0: Event not active (default)
1: Event active
RI1 Event Enable.
0: Disabled (default)
1: Enabled
RI2 Event Enable.
0: Disabled (default)
1: Enabled
Reserved.
RING Event Enable.
0: Disabled (default)
1: Enabled
Module IRQ
Enable
Event
16
7
0
16
on V
Software
Enable
Event
PP
6
0
power-up or Host Domain Software reset. When enabled wake-up events are detected,
5
0
(Continued)
Reserved
Description
Description
324
4
0
Enable
Event
RING
3
0
Reserved
2
0
Enable
Event
RI2
1
0
Enable
Event
RI1
Revision 1.07
0
0