pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 54
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pc87591l
Manufacturer Part Number
pc87591l
Description
Lpc Mobile Embedded Controllers
Manufacturer
National Semiconductor Corporation
Datasheet
1.PC87591L.pdf
(437 pages)
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2.0 Signal/Pin Description and Configuration
Strap Pin Status Register (STRPST)
The STRPST register is a byte-wide, read-only register. It enables the software to read the value set to strap pins during
Power-Up reset. STRPST bits provide the value of their respective strap input. See Table 7 for bit details.
Location: 00 FF12
Type: RO
Reset Value: According to external straps
2.4
2.4.1
The PC87591x uses the GPIO port pins to multiplex functions, thereby maximizing the device’s flexibility. Table 8 lists all the
pins with such alternate functions and summarizes their selection criteria. To select alternate pin functions, strap inputs flash
memory and configuration registers are used as follows:
When a pin is used as GPIO and not as its alternate function, disable the alternate function in the relevant module’s register.
Note: In Table 8, the PKG column shows pins available in both 128- and 176-pin packages and pins available only in 176-
pin packages.
Bit
Name
Reset
128/176 Name
128/176 IOPA0
128/176 IOPA1
128/176 IOPA2
128/176 IOPA3
128/176 IOPA4
128/176 IOPA5
128/176 IOPA6
128/176 IOPA7
128/176 IOPB0
128/176 IOPB1
128/176 IOPB2
128/176 IOPB3
128/176 IOPB4
PKG
The ports’ Alternate Function Control register controls the IOPA, IOPB, IOPC, IOPD, IOPE and IOPF pins. Each of
the ports’ pins may be used as a GPIO port or its alternate function, based on the setting of the corresponding bit in
PxALT register.
The environment setting and MCFG bits control port IOPH, IOPI, IOPJ, IOPK, IOPL and IOPM pins. In IRE and OBD
environments, these pins may function either as GPIO or their alternate function (as indicated in the table). In DEV
environment, they all function as their alternate functions.
Interrupts may be enabled together with the use of the pin as input or with its alternate function when the alternate
function is an input. Enabling the interrupt input is done via the port’s alternate function or the respective bit in EICFG
register.
Strap inputs and their associated internal pull-down resistor function during V
The Protection Word in the flash configures the use of RESET2 input.
ALTERNATE FUNCTIONS
GPIO with Alternate Functions
GPIO
16
Type
7
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
ACCESS.bus
Module
USART
PWM
6
Alternate Function 1
Table 8. Alternate Function Selection
Reserved
Signal Name
USCLK
PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
URXD
UTXD
5
SDA1
SCL1
54
4
PAALT.0
PAALT.1
PAALT.2
PAALT.3
PAALT.4
PAALT.5
PAALT.6
PAALT.7
PBALT.0
PBALT.1
PBALT.2
PBALT.3
PBALT.4
Select
(Continued)
3
Module
CC
BADDR1
Power-Up reset.
2
Alternate Function 2
Signal Name
BADDR0
1
Select
SHBM
Revision 1.07
0
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