pc87591l National Semiconductor Corporation, pc87591l Datasheet - Page 264

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pc87591l

Manufacturer Part Number
pc87591l
Description
Lpc Mobile Embedded Controllers
Manufacturer
National Semiconductor Corporation
Datasheet

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Embedded Controller Modules
Flash Address Register (FL_ADDR)
FL_ADDR is a shift register that enables reading from and writing to flash addresses. The address includes two fields: the
Flash Address and the Block Identifier (main block or information block). In Capture-DR state, the next address for read
and/or program is read. In case of a program or page erase fail, the offset within the section of the failing memory location
is returned. In Update-DR state, the address register is loaded with a new address. The connection of the register to the
serial chain is shown in Figure 89. The address register is reset at Power-Up and TAP resets only.
Type: R/W
31-28
Bit
Name
Reset
27-0
31-16 Reserved.
Bit
15-8 SRID (SuperI/O Revision ID). Returns the value of SID register (see “SuperI/O Revision ID Register (SRID)” on
7-0
Bit
Type
SID (SuperI/O Identification). Returns the value of SID register (see “SuperI/O ID Register (SID)” on page 344)
page 346)
R/W Flash Address. Holds the flash address in bytes, starting from address 00000
R/W Block ID. Holds an ID for a specific block. The ID field values are:
31 30 29 28 27 26 25 24 23 2 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
depends on the block size. All addresses must be word aligned. Note that the field may hold values larger
than the actual flash size. Addresses beyond the flash size are reserved and should not be specified.
Bits
31 30 29 28
Other:
Block ID
0 0 0 0:
0 0 0 1:
0 0 1 0:
0
Description
For Capture-DR, reserved; for Update-DR, no load of Address and Block ID registers (default)
Flash Main Block
Flash Information Block
Reserved
TDI
31
Figure 89. Flash Address Register
3
(Continued)
Block ID
0
FL_ADDR
Description
264
27
Description
Flash Address
Flash Address
0
0
0
TDO
16
. The flash last address
Revision 1.07

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