XW2Z-200J-B9 Omron, XW2Z-200J-B9 Datasheet - Page 472

• Manufacturer Part Number: XW2Z-200J-B9
• Description: CONNECTOR CABLE 2M
• Manufacturer: Omron

Specifications of XW2Z-200J-B9

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: XW2Z200JB9

D-3
The following table lists the execution times for all instructions that are available for the FQM1.
The total execution time of instructions within one whole user program is the process time for program execu-
tion when calculating the cycle time. (See note.)
Note User programs are allocated tasks that can be executed within cyclic tasks and interrupt tasks that sat-
Execution times for most instructions differ depending on the conditions when the instruction is executed. The
execution time can also vary when the execution condition is OFF.
The following table also lists the length of each instruction in the Length (steps) column. The number of steps
required in the user program area for each of the instructions varies from 1 to 7 steps, depending upon the
instruction and the operands used with it. The number of steps in a program is not the same as the number of
instructions.
Note
Sequence Input Instructions
Note When a double-length operand is used, add 1 to the value shown in the length column in the above
Auxiliary Area Allocations
LOAD
LOAD NOT
AND
AND NOT
OR
OR NOT
AND LOAD
OR LOAD
NOT
CONDITION ON
CONDITION OFF
LOAD BIT TEST
LOAD BIT TEST NOT
AND BIT TEST
AND BIT TEST NOT
OR BIT TEST
OR BIT TEST NOT
Instruction
isfy interrupt conditions.
table.
(1) Program capacity for the FQM1 is measured in steps. Basically speaking, 1 step is equivalent to 1
(2) Use the following time as a guideline when instructions are not executed.
FQM1 Instruction Execution Times and Number of Steps
@ or %
word.
Most instructions are supported in differentiated form (indicated with , , @, and %). Specifying
differentiation will increase the execution times by the following amounts.
Approx. 0.2 to 0.5 s
or
Symbol
Mnemonic
LD
LD NOT
AND
AND NOT
OR
OR NOT
AND LD
OR LD
NOT
UP
DOWN
LD TST
LD TSTN
AND TST
AND TSTN 351
OR TST
OR TSTN
+0.5
+0.5
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520
521
522
350
351
350
350
351
Code
s
1
1
1
1
1
1
1
1
1
3
4
4
4
4
4
4
4
Length
(steps)
note.)
(See
0.10
0.10
0.10
0.10
0.10
0.10
0.05
0.05
0.05
0.50
0.50
0.35
0.35
0.35
0.35
0.35
0.35
ON execution
time ( s)
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
implementation
Hardware
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Conditions
Appendix D
445