XW2Z-200J-B9 Omron, XW2Z-200J-B9 Datasheet - Page 404

• Manufacturer Part Number: XW2Z-200J-B9
• Description: CONNECTOR CABLE 2M
• Manufacturer: Omron

Specifications of XW2Z-200J-B9

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: XW2Z200JB9

B-10 Auxiliary Area
B-10-1 Auxiliary Area: A000 to A959 (A000.00 to A959.15)
The Auxiliary Area contains flags (controlled by the system) and control bits (controlled by the user) used to
monitor and control FQM1 operation. The functions of these flags and bits are predetermined and include error
flags from self-diagnosis, initial settings, operation controls, and operation status monitor data.
The bits and words in this area can be read and written from the program or from the CX-Programmer.
The bits in this area cannot be force-set or force-reset continuously.;
The CX-Programmer read/write operations include setting and resetting bits online (not forced), changing
present values from address monitor displays, and transfer operations to the FQM1 after editing FQM1 data
tables on the CX-Programmer. Refer to the CX-Programmer Operation Manual (Cat. No. W437) for details.
B-11 Temporary Relay Area (TR)
The TR Area contains bits that record the ON/OFF input condition status at program branches. The TR bits are
used with mnemonics only.
TB bits are used in the following cases.
Note In the following cases, there are either no LD instructions after the branch points, or any LD instructions
I/O Memory
• TR0 to TR15 can be used in any order and any number of times.
• TR bits can be used only in OUT and LD instructions.
• Each TR bit can be used only once in one program section.
• The status of TR bits cannot be changed from the CX-Programmer.
• When there are two outputs with different LD instructions after the last branch point:
• When there is no LD instruction on the lower rung after a branch point:
OUT instructions (OUT TR0 to OUT TR15) are used to store the input conditions at branch points. LD
instructions (LD TR0 to LD TR15) are used to read the input conditions previously stored at branch points.
are on the bottom rung. TR bits are not required in these types of branches.
0000.00
0000.01
0000.00
TR0
TR0
0000.04
0000.02
0000.01
0002.03
0002.05
0002.02
0002.03
Instruction
LD
OR
OUT
AND
OUT
LD
AND
OUT
Instruction
LD
OUT
AND
OUT
LD
OUT
0000.00
0000.01
TR 0
0000.02
0002.03
TR 0
0000.04
0002.05
Operand
Operand
0000.00
TR 0
0000.0 1
0002.02
TR 0
0002.03
Appendix B
377