TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 82

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

/INTEDMA01
/INTEDMA23
/INTEDMA45
INTETC01
INTETC23
INTETC45
INTETC67
Symbol
INTWDT
Interrupt request flag
INTTC0/INTDMA0 &
INTTC1/INTDMA1
enable
INTTC2/INTDMA2 &
INTTC3/INTDMA3
enable
INTTC4/INTDMA4 &
INTTC5/INTDMA5
enable
INTTC6 & INTTC7
enable
INTWD
enable
Name
Address
F1H
F2H
F3H
F4H
F7H
/IDMA1C
/IDMA3C
/IDMA5C
ITC1C
ITC3C
ITC5C
ITC7C
7
R
R
R
R
0
0
0
0
−
−
lxxM2
/IDMA1M2
/IDMA3M2
/IDMA5M2
ITC1M2
ITC3M2
ITC5M2
ITC7M2
0
0
0
0
1
1
1
1
92CF26A-80
INTTC1/INTDMA1
INTTC3/INTDMA3
INTTC5/INTDMA5
Always write “0”.
INTTC7 (DMA7)
6
0
0
0
0
−
−
lxxM1
/IDMA1M1
/IDMA3M1
/IDMA5M1
ITC1M1
ITC3M1
ITC5M1
ITC7M1
0
0
1
1
0
0
1
1
R/W
R/W
R/W
R/W
5
0
0
0
0
−
−
/IDMA1M0
/IDMA3M0
/IDMA5M0
lxxM0
ITC1M0
ITC3M0
ITC5M0
ITC7M0
1
0
1
0
1
0
0
1
4
0
0
0
0
−
Disables interrupt requests
Sets interrupt priority level to 1
Sets interrupt priority level to 2
Sets interrupt priority level to 3
Sets interrupt priority level to 4
Sets interrupt priority level to 5
Sets interrupt priority level to 6
Disables interrupt requests
/IDMA0C
/IDMA2C
/IDMA4C
ITCWD
ITC0C
ITC2C
ITC4C
ITC6C
3
R
R
R
R
R
0
0
0
0
0
/IDMA0M2
/IDMA2M2
/IDMA4M2
ITC0M2
ITC2M2
ITC4M2
ITC6M2
INTTC0/INTDMA0
INTTC2/INTDMA2
INTTC4/INTDMA4
Function (Write)
INTTC6 (DMA6)
2
0
0
0
0
−
−
INTWD
/IDMA0M1
/IDMA2M1
/IDMA4M1
ITC0M1
ITC2M1
ITC4M1
ITC6M1
TMP92CF26A
R/W
R/W
R/W
R/W
1
0
0
0
0
−
−
2009-06-25
/IDMA0M0
/IDMA2M0
/IDMA4M0
ITC0M0
ITC2M0
ITC4M0
ITC6M0
0
0
0
0
0
−
−