TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 635

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

3.25.2
• Entering the Power Cut Mode
Note: As soon as the PMCCTL<PCM_ON> bit is set to 1, the power management signal (PWE) changes from 1 to 0
converter. Then, configure the output pins to function as ports through the Pn, PnCR and
PnDR registers. At this time, the PM7 pin should be configured as the PWE input pin. Also,
the internal RTC pin and the external interrupt pins that are used for waking up from the
Power Cut mode should be configured as interrupt inputs and enabled.
the INT4 pin is used as the TSI input, the debounce circuit should be disabled.
46000H to 49FFFH.
waking up should be predefined in this wake-up program.)
the Power Cut mode (the time period required for the power supply voltage and the
high-frequency clock to stabilize) by the PMCCTL<WUTM1:0> bits. Power Cut mode is
then entered by writing a 1 to the PMCCTL<PCM_ON> bit.
external I/O and PMC.
Detailed Description of Mode Transitions
When entering the Power Cut mode, the CPU needs to be executing in the on-chip RAM.
The low-frequency clock (XT) must be enabled.
It is also necessary to disable interrupts, and to stop DMA operations, WDT and AD
The interrupt inputs should be configured as rising-edge triggered, if configurable. When
The wake-up program must be prewritten to the on-chip RAM area at addresses from
(Including the initial setting of the WDT and other registers, all the required settings for
Finally, stop the PLL if it is operated, and specify the warm-up time for waking up from
At this time, the RESET (HOT_RESET) signal is asserted to all the circuits excluding the
This section explains the procedures for entering and exiting the Power Cut mode.
and external power supplies are turned off.
92CF26A-633
TMP92CF26A
2009-06-25