TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 269

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
3.11.8
Note 1: A reset sets the
Note 2: The pull-up resistor value for the NDR/B pin must be set appropriately according to the NAND Flash memory
Note 3: The
An Example of Connections with NAND Flash
TMP92CF26A
to be used and the capacity of the board (typical: 2 K Ω ).
external circuit.
ND
ND
NDCLE
D[15:0]
NDALE
NDWE
NDRE
NDR/B
1
0
WP
CE
CE
Figure3.11.10 An Example of Connections with NAND Flash
(Write Protect) pin of NAND Flash is not supported. When this function is needed, prepare it on an
NDRE
2K Ω
100K Ω
and
NDWE
92CF26A-267
pins as input ports, so pull-up resistors are needed.
CLE
ALE
R/B (open drain)
I/O[15:0]
RE
WE
NAND-Flash-0
CE
External circuits for Write-protect
WP
I/O[7:0]
CLE
ALE
R/B (open drain)
RE
WE
NAND-Flash-1
CE
WP
TMP92CF26A
2009-06-25

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