TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 566

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
3.19.5
3.19.5.1 PIP (Picture in Picture) Function
Note: Always set Sub Area within Main Area. The size that is bigger than the Main Area can not be set to the Sub
Special Functions
Case1: Main Area size<Sub Area size
Area, and the Sub area setting that lap Main Area.
different screen to be displayed over the screen currently being displayed on the LCD.
“main screen” and “sub screen”. For the main screen, the display size and start
address are specified as in the case of the normal screen display. For the sub screen,
the display size and start address are also specified for determining the position and
size of the sub screen.
sub screen and the PIP function is enabled by setting LCDCTL0 <PIPE> to “1”, the
sub screen is displayed over the main screen.
Start Address
Start Address
The TMP92CF26A includes a PIP (Picture in Picture) function that allows a
The PIP function manages the address space of display memory by dividing it into
When the HOT point (upper-left corner) and segment/common size are set for the
Main Area
LCD Panel (PIP OFF)
Sub Area
Main Area
Sub Area
92CF26A-564
VRAM Memory Map
HOT Point
Case2: Sub Area exceed Main Area
Main Area
LCD Panel (PIP ON)
Sub Area
Note: This is just an image of memory map
and doesn’t describe the image of bit
map.
TMP92CF26A
2009-06-25

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