TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 708

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

/INTEDMA01
/INTEDMA23
/INTEDMA45
INTETC01
INTETC23
INTETC45
INTETC67
Symbol
INTWDT
INTCLR
IIMC0
IIMC1
SIMC
(2) Interrupt control (3/4)
INTTC0/INTDMA0
&
INTTC1/INTDMA1
enable
INTTC2/INTDMA2
&
INTTC3/INTDMA3
enable
INTTC4/INTDMA4
&
INTTC5/INTDMA5
enable
INTTC6 & INTTC7
enable
SIO
interrupt mode
control
Interrupt
input mode
control 0
INTWD
enable
Interrupt
clear control
Interrupt
input mode
control 1
Name
(Prohibit
(Prohibit
(Prohibit
(Prohibit
Address
00F1H
00F2H
00F3H
00F4H
00F5H
00F6H
00F7H
00F8H
00FAH
RMW)
RMW)
RMW)
RMW)
INT5
edge
0: Rising
1: Falling
/IDMA1C
/IDMA3C
/IDMA5C
write “0”
I5EDGE
Always
CLRV7
ITC1C
ITC3C
ITC5C
ITC7C
0
0
0
W
W
7
R
R
R
R
0
−
0
0
−
−
0
/IDMA1M2
/IDMA3M2
/IDMA5M2
INT4
edge
0: Rising
1: Falling
I4EDGE
ITC1M2
ITC3M2
ITC5M2
ITC7M2
write “0”
CLRV6
Always
INTTC1/INTDMA1
INTTC3/INTDMA3
INTTC5/INTDMA5
92CF26A-706
INTTC7 (DMA7)
Always write “0”
W
W
0
0
0
6
0
−
0
0
−
0
−
/IDMA1M1
/IDMA3M1
/IDMA5M1
INT3
edge
0: Rising
1: Falling
I3EDGE
ITC1M1
ITC3M1
ITC5M1
ITC7M1
CLRV5
R/W
R/W
R/W
R/W
0
0
0
W
5
0
0
−
−
0
/IDMA1M0
/IDMA3M0
/IDMA5M0
INT2
edge
0: Rising
1: Falling
I2EDGE
ITC1M0
ITC3M0
ITC5M0
ITC7M0
CLRV4
Interrupt vector
0
0
0
W
4
0
0
−
0
W
INT1
edge
0: Rising
1: Falling
/IDMA0C
/IDMA2C
/IDMA4C
I1EDGE
ITCWD
CLRV3
ITC0C
ITC2C
ITC4C
ITC6C
0
0
0
W
3
R
R
R
R
R
0
0
0
0
/IDMA0M2
/IDMA2M2
/IDMA4M2
INT0
edge
0: Rising
1: Falling
I0EDGE
ITC0M2
ITC2M2
ITC4M2
ITC6M2
CLRV2
INTTC0/INTDMA0
INTTC2/INTDMA2
INTTC4/INTDMA4
INTTC6 (DMA6)
0
0
0
W
2
0
0
−
−
−
0
INTWD
/IDMA0M1
/IDMA2M1
/IDMA4M1
0: INT0
edge mode
1:INT0
level mode
INT7
edge
0: Rising
1: Falling
I7EDGE
ITC0M1
ITC2M1
ITC4M1
ITC6M1
CLRV1
R/W
R/W
R/W
R/W
TMP92CF26A
I0LE
R/W
0
0
0
W
1
0
0
−
−
−
0
0
2009-06-25
/IDMA0M0
/IDMA2M0
/IDMA4M0
0: INTRX0
edge
mode
1: INTRX0
level
mode
Always
write “0”
INT6
edge
0: Rising
1: Falling
ITC0M0
ITC2M0
ITC4M0
I6EDGE
ITC6M0
CLRV0
IR0LE
R/W
0
0
0
W
W
0
0
1
−
0
−
−
−
0
0