TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 342

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

using the internal clock f
Setting the master controller
Setting the slave controller
Setting example: To link two slave controllers serially with the master controller
Main routine
P9CR
P9FC
P9FC2
INTES0
SC0MOD0 ← 0 0 1 1 1 1 1 0
Interrupt routine (INTRX0)
Acc ← SC0BUF
if Acc =Select code
Then SC0MOD0 ← − − − 0 − − − − Clear <WU> to 0.
Main routine
INTES0
SC0MOD0 ← 1 0 1 0 1 1 1 0
SC0BUF
Interrupt routine (INTTX0)
SC0MOD0 ← 0 − − − − − − −
SC0BUF
P9CR
P9FC
TXD
Master
← X X X X X − 0 1
← − − X X X − X 1
← X X X X X X X 1
← X 1 0 0 X 1 0 0
← X 1 0 0 X 1 0 1
← X X X X X − 0 1
← − − X X X − X 1
← 0 0 0 0 0 0 0 1
← * * * * * * * *
RXD
IO
92CF26A-340
as the transfer clock.
TXD
Select code
00000001
Slave1
Enable INTRX0 and INTTX0.
Set <WU> to 1 in 9-Bit UART Transmission Mode using f
the transfer clock.
Enable the INTTX0 interrupt and set it to Interrupt Level 4.
Enable the INTRX0 interrupt and set it to Interrupt Level 5.
Set f
Set the select code for slave controller 1.
Set TB8 to 0.
Set data for transmission.
Select P91 and P90 to function as the RXD0 and TXD0 pins
respectively (open-drain output).
Set P90 and P91 to function as the TXD0 and RXD0 pins
respectively.
IO
RXD
as the transmission clock for 9-Bit UART Mode.
Select code 00001010
TXD
Slave 2
RXD
TMP92CF26A
2009-06-25
IO
as