TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 497

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

SPIIE
(82CH)
(82DH)
Bit Symbol
Read/Write
Reset State
Function
Bit Symbol
Read/Write
Reset State
Function
(d) RENDIE
(3-2) SPI Interrupt Enable Register (SPIE)
Note: The SPIC supports four types of interrupts; two transmit interrupts (TEMP,and TEND, both of which causes the
(a) TEMPIE
(b) RFULIE
(c) TENDIE
The SPIIE register enables or disables the generation of four types of interrupts.
generation of the INTSPITX interrupt request) and two receive interrupts (RFUL and REND, both of which
causes the generation of the INTSPIRX interrupt request). However, for the proper operation, select either one
of the TEMP and TEND interrupts and also select either one of the RFUL and REND interrupts. (Simultaneous
use of the TEMP and TEND interrupts is prohibited, as well as the simultaneous usage of the RFUL and REND
interruptsy.)
This bit enables or disables the TEMP interrupt.
This bit enables or disables the RFUL interrupt.
This bit enables or disables the TEND interrupt.
This bit enables disables the REND interrupt.
15
7
14
6
Figure 3.17.10 SPIIE Register
13
5
92CF26A-495
SPIIE Register
12
4
TEMP
interrupt
0:Disable
1:Enable
TEMPIE
11
3
0
RFUL
interrupt
0:Disable
1:Enable
RFULIE
10
2
0
R/W
TEND
interrupt
0:Disable
1:Enable
TENDIE
1
9
0
REND
interrupt
0:Disable
1:Enable
TMP92CF26A
RENDIE
2009-06-25
0
8
0