TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 502

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

3.18 I
This function enables the TMP92CF26A to be used for digital audio systems by connecting an
LSI for audio output such as a DA converter.
2
S (Inter-IC Sound)
The TMP92CF26A incorporates serial output circuitry that is compliant with the I
The I
2
Number of Channels
Format
Pins used
WS frequency
Data transfer rate
Transmission buffer
Direction of data
Data length
Clock edge
Interrupt
S unit has the following features:
Item
Table 3.18.1 I
2 channels
I
Right-justified and left-justified formats supported
Stereo / monaural
Master transmission only
1. I2SnCKO (clock output)
2. I2SnDO (output)
3. I2SnWS (Word Select output)
Refer to “Setting the transfer clock generator and Word Select signal”.
64 bytes × 2
MSB-first or LSB-first selectable
8 bits or 16 bits
Rising edge or falling edge
INTI2Sn
(64-byte FIFO empty interrupt)
92CF26A-500
2
S-format compliant
2
S Operation Features
Description
TMP92CF26A
2009-06-25
2
S format.