TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 619

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

ADCM1REGH
(12B7H)
ADCM0REGH
(12B5H)
ADCM0REGL
(12B4H)
ADCM1REGL
(12B6H)
bit Symbol
Read/Write
Reset State
Function
bit Symbol
Read/Write
Reset State
Function
bit Symbol
Read/Write
Reset State
Function
bit Symbol
Read/Write
Reset State
Function
Note: Disable the AD monitor function (ADMOD4<CMEN1:0> = “0”) before attempting to set or modify the value of
these registers.
Store Lower 2 bits of an
Store Lower 2 bits of an
AD conversion result
AD Conversion Result Compare Criterion Register 0 High
AD conversion result
AD Conversion Result Compare Criterion Register 1 High
AD Conversion Result Compare Criterion Register 0 Low
AD Conversion Result Compare Criterion Register 1 Low
ADR21
ADR29
ADR21
ADR29
compare criterion
compare criterion
7
7
7
7
0
0
0
0
R/W
R/W
Figure 3.23.10 AD Conversion Registers
ADR20
ADR28
ADR20
ADR28
6
6
6
6
0
0
0
0
Store Upper 8 bits of an AD conversion result compare criterion
Store Upper 8 bits of an AD conversion result compare criterion
ADR27
ADR27
92CF26A-617
5
5
5
5
0
0
ADR26
ADR26
4
4
4
4
0
0
R/W
R/W
ADR25
ADR25
3
3
3
3
0
0
ADR24
ADR24
2
2
2
2
0
0
ADR23
ADR23
1
1
1
1
0
0
TMP92CF26A
2009-06-25
ADR22
ADR22
0
0
0
0
0
0