TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 518

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TMP92xy26AXBG

Manufacturer Part Number
TMP92xy26AXBG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP92xy26AXBG

Package
FPGA228
Rom Types(m=mask,p=otp, F=flash,e=eeprom)
Romless
Rom Combinations
Romless
Ram Combinations
144/288
Architecture
32-bit CISC
Usb/spi Channels
1/1
Uart/sio Channels
2
I2c/sio Bus Channels
1
(s)dram Controller
1
Adc 10-bit Channel
6
Da Converter
-
Timer 8-bit Channel
8
Timer 16-bit Channel
2
Pwm 8-bit Channels
-
Pwm 16-bit Channels
-
Cs/wait Controller
4
Dual Clock
Y
Number Of I/o Ports
136
Power Supply Voltage(v)
3.0 to 3.6
3.19 LCD Controller (LCDC)
(LCD module). This LCDC supports monochrome, grayscale, from 256-color to 16777216-color
and display sizes from 64 × 64 to 640 × 480 dots. The supported LCD driver (LCD module) types
are STN (Super Twisted Nematic) and digital RGB input TFT (Thin Film Transistor).
The TMP92CF26A incorporates an LCD controller (LCDC) for controlling an LCD driver LSI
4-graysale, 16-grayscale, 64-grayscale, 256-color, 4096-color, 65536-color display.
size (common, segment) are made in the I/O registers, the start register is set to enable the
LCDC. The LCDC outputs a bus request to the CPU, reads data from the display RAM,
converts the data as necessary, and writes it to a dedicated FIFO buffer.
used to realize 4096-color, 65536-color, 262144-color, and 16777216-color display. The data
transfer method is the same as in the case of STN.
(R4:G4:B4), 16-bit RGB (R5:G6:B5), 18-bit RGB (R6:G6:B6), or 24-bit RGB (R8:G8:B8)
display data, the shift clock LCP0 for capturing data, the frame signal LFR, the data load
signal LLOAD, and the LDIV signal for indicating the inversion of data output. The LDIV
signal can be used effectively in reducing noise and power consumption.
synchronization signal LVSYNC for controlling gate drivers, and three programmable OE
pins for supporting various signals of the TFT driver to be used.
With LCD drivers supporting STN, an 8-bit data interface is used to realize monochrome,
After required settings such as the operation mode, display RAM start address, and LCD
With LCD drivers supporting digital RGB input TFT, an 8- to 24-bit data interface is
The LCDC controls LCD display operations using 8-bit RGB (R3:G3:B2), 12-bit RGB
The LCDC also has horizontal synchronization signal LHSYNC and vertical
STN support
TFT support
92CF26A-516
TMP92CF26A
2009-06-25

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