TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 143

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

3.7.11
ADTRG
(for PG3 only)
internal AD converter. PG3 can also be used as the ADTRG pin for the AD converter.
always needed.
Port G (PG0 to PG5)
PG0 to PG5 are 6-bit input ports and can also be used as the analog input pins for the
PG2 and PG3 can also be used as the MX and MY pins for a Touch screen interface.
(PG) register is prohibited to access by byte. All the instruction (Arithmetic/Logical/
Bit operation and rotate/shift instruction) access by byte are prohibited. Word access is
AD read
Port G read
Conversion
Register
Result
Figure 3.7.29 Port G
92CF26A-141
Converter
AD
Switch for TSI
Typ.10 Ω
Channel
Selector
TSICR0<MXEN,
TSICR0<TSI7 >
(PG2,PG3 only)
PG0(AN0),
PG1(AN1),
PG2(AN2,MX),
PG3(AN3,MY, ADTRG )
PG4(AN4)
PG5(AN5)
MYEN >
TMP92CF26A
2009-06-25