TMP92xy26AXBG Toshiba, TMP92xy26AXBG Datasheet - Page 263

• Manufacturer Part Number: TMP92xy26AXBG
• Manufacturer: Toshiba

Specifications of TMP92xy26AXBG

• Package: FPGA228
• Rom Types(m=mask,p=otp, F=flash,e=eeprom): Romless
• Rom Combinations: Romless
• Ram Combinations: 144/288
• Architecture: 32-bit CISC
• Usb/spi Channels: 1/1
• Uart/sio Channels: 2
• I2c/sio Bus Channels: 1
• (s)dram Controller: 1
• Adc 10-bit Channel: 6
• Da Converter: -
• Timer 8-bit Channel: 8
• Timer 16-bit Channel: 2
• Pwm 8-bit Channels: -
• Pwm 16-bit Channels: -
• Cs/wait Controller: 4
• Dual Clock: Y
• Number Of I/o Ports: 136
• Power Supply Voltage(v): 3.0 to 3.6

3.
Read
Reading valid data
; ***** Read valid data*****
;
;
;
;
;
;
Generating ECC → Reading ECC
; ***** Read ECC *****
;
Software processing
;
;
;
;
ldw
ldw
ld
ldw
ld
Wait setup time (from Busy to Ready)
ldw
ld
ldw
ld
ld
ld
ld
ldw
ldw
ldw
ldw
ldw
The ECC data generated for the read operation and the ECC in the
redundant area in the NAND Flash are compared. If any error is found, the
error processing routine is performed to correct the error data. For details,
see 3.11.4.2 “Error Correction Methods”.
(ndfmcr0),2010h ; CE0 enable
(ndfmcr0),20B0h ; WE enable, CLE enable
(ndfdtr0),00h
(ndfmcr0),20D0h ; ALE enable
(ndfdtr0),xxh
1. Flag polling
2. Interrupt
(ndfmcr0),2015h ; Reset ECC, ECCE enable, CE0 enable
xx,(ndfdtr0)
(ndfmcr0),2010h ; ECC circuit disable
xx,(ndfdtr0)
xx,(ndfdtr0)
xx,(ndfdtr0)
xx,(ndfdtr0)
(ndfmcr0),2010h ; ECC circuit disable
xxxx,(ndeccrd0)
1’st Read:
xxxx,(ndeccrd1)
2’nd Read:
xxxx,(ndeccrd0)
3’rd Read:
xxxx,(ndeccrd1)
4’th Read:
92CF26A-261
; Read command
; Address write (3 or 4 times)
; Data read (512 times)
; Redundancy data read (8 times)
; ECC data read (3 times)
; Redundancy data read (2 times)
; ECC data read (3 times)
; Read ECC from internal circuit
D15-0 > LPR15:0
; Read ECC from internal circuit
D15-0 > FFh+CPR5:0+11b For first 256 bytes
; Read ECC from internal circuit
D15-0 > LPR15:0
; Read ECC from internal circuit
D15-0 > FFh+CPR5:0+11b For second 256 bytes
For first 256 bytes
For second 256 bytes
TMP92CF26A
2009-06-25